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Shielded gate field effect transistor and method of forming the same

A field-effect transistor and shielded gate technology, which is applied in the manufacturing of semiconductor devices, electric solid-state devices, and semiconductor/solid-state devices, etc., can solve problems such as short-circuiting of shielding electrodes and gate electrodes, so as to ensure electrical isolation, simplify processes, and save energy. cost effect

Active Publication Date: 2022-04-29
SEMICON MFG ELECTRONICS (SHAOXING) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0014] The purpose of the present invention is to provide a method for forming a shielded gate field effect transistor to solve the problem that the shielding electrode and the gate electrode are easily shorted in the existing shielded gate field effect transistor

Method used

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  • Shielded gate field effect transistor and method of forming the same
  • Shielded gate field effect transistor and method of forming the same
  • Shielded gate field effect transistor and method of forming the same

Examples

Experimental program
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Embodiment 1

[0102] figure 2 It is a schematic flow chart of a method for forming a shielded gate field effect transistor in Embodiment 1 of the present invention, Figure 3a ~ Figure 3g It is a schematic diagram of the structure of the method for forming the shielded gate field effect transistor in the first embodiment of the present invention during its preparation process.

[0103] In step S100, specifically refer to Figure 3a As shown, a substrate 100 is provided, the substrate 100 defines a cell region 100A and a source connection region 100B, and a gate trench 110 is formed in the substrate 100, and the gate trench 110 It has a first trench 110A located in the cell region 100A and a second trench 110B located in the source connection region 100B.

[0104] Wherein, the gate trench 110 is used to accommodate the shielding electrode and the gate electrode. And, in a subsequent process, the shielding electrode is formed in the first trench 110A of the cell region 100A, and is furthe...

Embodiment 2

[0155] The difference from Embodiment 1 is that in step S300 of this embodiment, when forming the isolation layer, the second isolation layer in the source connection region can still have a larger height, for example, the second isolation layer can be made The top surface is not lower than the top surface of the substrate.

[0156] Figure 4a ~ Figure 4e It is a schematic structural diagram of the method for forming a shielded gate field effect transistor in Embodiment 2 of the present invention after step S300 is performed. The following combination Figure 4a ~ Figure 4e The formation method in this example will be described.

[0157] In step S300, specifically refer to Figure 4a with Figure 4b As shown, an isolation layer 500' is formed in the gate trench 110. Wherein, the isolation layer 500' is located in the first trench 110A, the top surface of which is lower than the top surface of the substrate 100; and, the isolation layer 500' is located in the second trench...

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Abstract

The invention provides a shielded gate field effect transistor and a forming method thereof. Wherein, when preparing the shielding electrode, the heights of the first shielding electrode located in the cell area and the second shielding electrode located in the source connection area are all reduced, so that when the isolation layer is prepared, the protection of the isolation layer can be utilized. , and avoid the lateral exposure of the part of the first dielectric layer covering the second shielding electrode, thereby preventing the problem of lateral erosion of the part of the first dielectric layer covering the second shielding electrode. In this way, it can effectively Solve the short-circuit phenomenon between the second shielding electrode and the gate electrode in the source connection region.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a shielded gate field effect transistor and a forming method thereof. Background technique [0002] A shielded gate field effect transistor (Shielded Gate Trench, SGT) is more conducive to the flexible application of semiconductor integrated circuits because of its low gate-to-drain capacitance Cgd, very low on-resistance, and high withstand voltage performance. Specifically, in the shielded gate field effect transistor, by setting the shielding electrode below the gate electrode, the gate-to-drain capacitance can be greatly reduced, and the drift region of the shielded gate field effect transistor also has a relatively high impurity carrier Concentration, can provide additional benefits to the breakdown voltage of the device, which can reduce the on-resistance accordingly. [0003] Compared with other trench field effect transistors, shielded gate field effect transistor...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L23/528H01L29/423
CPCH01L29/4236H01L23/5283H01L21/76831H01L21/76879
Inventor 宋金星
Owner SEMICON MFG ELECTRONICS (SHAOXING) CORP