Stacked packaging structure and preparation method thereof

Abstract

The invention discloses a stacked packaging structure, which comprises: a first chip, wherein the first chip is inversely attached to the first rewiring layer, and a welding pad of the first chip is provided with a bump; a bottom layer filling film covering the front surface of the first chip; a first conductive channel disposed around the first chip; a first plastic package layer wrapping the first chip and the upper part of the first conductive channel; the first rewiring layer which is formed on the back surface of the bottom layer filling film and is electrically connected to the first chip and the first conductive channel; a first dielectric layer covering the surface and a gap of the first rewiring layer; a second chip right attached to the surface of the first plastic package layer;a second conductive channel disposed around the second chip; a second plastic package layer wrapping the second chip and the second conductive channel; a second rewiring layer formed on the surface of the second plastic package layer and electrically connected to the second chip and the second conductive channel; and a second dielectric layer covering the surface and a gap of the second redistribution layer.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuit packaging, in particular to a stack packaging technology. Background technique [0002] With the rapid development of semiconductor integrated circuit technology, electronic packaging products have a high-density, multi-functional development trend. Three-dimensional stack packaging means that at least two layers of chips are stacked and packaged, so that more semiconductor chips can be integrated in a smaller space. In the prior art, vertical conductive channels and rewiring structures are often used to realize the conductive interconnection of chips of each layer. When the diameter of the channel is small, methods such as atomic layer deposition (ALD) and chemical vapor deposition (CVD) can be used to first deposit the metal adhesion layer and seed layer, or only deposit the conductive metal adhesion layer, and then electroplate copper to fill the conductive channel . ...

AI Technical Summary

Problems solved by technology

However, since the large-sized channel can satisfy the function of conductive interconnection after being filled to a certain thickness, the method of electroplating copper is still used to completely fill the channel, which not only increases the cost, but also makes the process more difficult. Filled, the middle of the conductive channel is still empty, the residual material in the process flow, or the reactants generated will accumulate in the middle of the channel, which will have a serious negative impact on the overall reliability of the package

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