Wafer back metallization structure, thinning device and metallization process method
A metallization structure and wafer technology, applied in the field of electronics, can solve the problems affecting the performance of the metallization on the back of the wafer, the lengthy and complicated surface treatment effect of the wafer metallization process, and the poor effect, so as to achieve the effect of optimizing the heat dissipation function
Pending Publication Date: 2020-07-10
北京芯之路企业管理中心(有限合伙)
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Problems solved by technology
[0007] The object of the present invention is to provide a metallization structure, a thinning device and a metallization process method on the back of the wafer, so as to solve the poor surface treatment effect caused by the lengthy and complicated wafer metallization process in the prior art, which usually affects Efficiency Issues with Wafer Backside Metallization
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[0045] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0046] In this embodiment, power devices are manufactured on a silicon wafer as an example. After the power device circuits and electrodes on the front side of the wafer are completed, a thinning process will be performed on the back side of the wafer. Generally, the thinning process will cause wafer deformation and warping. The thinner the wafer is, the greater the warpage will be. It will also cause wafer fragmentation. The thinner the wafer, the greater the ...
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Abstract
The invention relates to the technical field of electronics, in particular to a wafer back metallization structure, a thinning device and a metallization process method. The structure comprises a thinned integrated circuit wafer, wherein the thinned integrated circuit wafer is a silicon wafer substrate; an integrated circuit is formed on the upper surface of the silicon wafer substrate. The lowersurface of the silicon wafer substrate is a thinned wafer back surface; a protective adhesive layer is arranged on the upper surface of the silicon wafer substrate and above the integrated circuit; ametal seed layer, a metal thin film layer and an ion implantation protection layer are sequentially arranged on the back face of the wafer downwards. According to the method, the productivity and theyield are improved, the automation rate is improved, the operation is safe, the quality is optimized, the equipment investment and the maintenance cost are saved, the cost of raw material consumablesis reduced, the adhesiveness of a metal layer is good, and the method has the advantages in the aspects of the product yield and the productivity.
Description
technical field [0001] The invention relates to the field of electronic technology, and specifically relates to a wafer back metallization structure, a thinning device and a metallization process method. Background technique [0002] As we all know, insulated gate bipolar transistor IGBT (Insulated Gate Bipolar Transistor), power metal oxide field effect transistor Power MOSFET (MOS Field Effect Transistor), intelligent power device IPD (Intelligent Power Device), etc. are increasingly widely used. In terms of reducing energy loss and optimizing heat dissipation, it is necessary to thin the wafer and carry out the metallization process on the crystal back. Therefore, the thinning process and the metallization process on the crystal back are related to the performance and performance of power semiconductor devices. yield. [0003] Currently, in the CMOS (Complementary Metal Oxide Semiconductor) manufacturing process, the back-end process of wafer processing includes steps su...
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IPC IPC(8): H01L21/67H01L29/739H01L21/331
CPCH01L21/67092H01L29/7397H01L29/66348
Inventor 苏晋苗苏冠暐
Owner 北京芯之路企业管理中心(有限合伙)