Silicon-based buffer layer and preparation method thereof
A buffer layer, silicon-based technology, applied in the direction of final product manufacturing, sustainable manufacturing/processing, electrical components, etc., can solve the problem of large lattice difference between Si and CdTe materials, and achieve the suppression of twin formation, improve efficiency, The effect of improving quality performance
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[0036] Such as figure 1 As shown, the method for preparing a silicon-based buffer layer according to an embodiment of the present invention includes:
[0037] S1, obtaining Si (silicon) wafers that are atomically clean;
[0038] S2, turning on the As (arsenic) beam source and the Te (tellurium) beam source in sequence to passivate the front side of the Si sheet.
[0039] It can be understood that the As beam source is first turned on for a period of time to use As (arsenic) to passivate the front side of the Si sheet, thereby facilitating the growth of the B-side of the epitaxial material. Then turn on the Te beam source toward the front of the Si sheet for surface passivation, so as to keep the B-side growth of the epitaxial material.
[0040] S3, turn on the Zn (zinc) beam source and the Te beam source alternately, and epitaxially form a ZnTe buffer layer on the front side of the passivated Si sheet.
[0041] It can be understood that first turn on the Zn beam source for ...
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