Semiconductor device and its forming method, chip
A semiconductor and device technology, applied in the field of chips, semiconductor devices and their formation methods, can solve problems such as bonding alignment misalignment, affecting the performance of semiconductor devices, and exposing metal layers, so as to prevent leakage, improve electrical performance and reliable quality resistance, the effect of preventing metal diffusion
Active Publication Date: 2021-08-06
WUHAN XINXIN SEMICON MFG CO LTD
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Or the openings (face-to-face) of adjacent wafers have the same size, but the bonding alignment is partially staggered, which will also cause the metal layer of the opening to be exposed.
In addition, there will be some free metal (such as copper) in the hybrid bonding interface. In the case where the metal layer is exposed and not isolated at the hybrid bonding interface, the chips made after wafer dicing will be connected between the upper and lower adjacent openings when the chip is energized. There is a risk of leakage, which affects the performance of semiconductor devices
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[0041] The semiconductor device, its forming method, and chip proposed by the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.
[0042] The method for forming a semiconductor device provided by an embodiment of the present invention, such as figure 1 shown, including:
[0043] A first wafer is provided, the first wafer includes a first substrate, a first dielectric layer on the first substrate, a first metal layer embedded in the first dielectric layer, at least one a first opening penetrating part of the thickness of the first dielectric layer and exposing the first metal layer...
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The invention provides a semiconductor device, its forming method and chip. A method for forming a semiconductor device, comprising: providing a first wafer and a second wafer; bonding the first wafer to the second wafer, and bonding the first interconnection metal layer to the second interconnection metal layer bonding; forming an isolation layer, the isolation layer covers at least the part of the first interconnection metal layer and the second interconnection metal layer on the bonding interface where any one of them is exposed by the other, so as to prevent metal diffusion, Effectively prevent leakage and improve the electrical performance and quality reliability of semiconductor devices.
Description
technical field [0001] The invention belongs to the technical field of integrated circuit manufacturing, and in particular relates to a semiconductor device, a method for forming the same, and a chip. Background technique [0002] Under the development trend of highly integrated semiconductors, multi-wafer stacks often use a hybrid bonding process to achieve bonding between wafers. The bonding surface between the adjacent wafers is a hybrid bonding interface of a dielectric layer to a dielectric layer and a metal layer to a metal layer located in the respective openings. The metal layers in the openings of adjacent wafers are bonded to the metal layer to realize the circuit interconnection between the wafers. In most cases, the size of the openings (face-to-face) of adjacent wafers is inconsistent, so the cross-sectional area of the metal layer (the cross section parallel to the bonding interface) in the respective openings is inconsistent, which will inevitably lead to t...
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IPC IPC(8): H01L21/18H01L29/06
CPCH01L21/187H01L29/06H01L24/80H01L24/08H01L2224/80895H01L2224/80896H01L2224/80948H01L2224/08058H01L2224/08121H01L2224/05546H01L2224/08145
Inventor 易洪昇叶国梁
Owner WUHAN XINXIN SEMICON MFG CO LTD