Extended EDAC check circuit and read-write method for extended Flash program storage area

Abstract

The invention discloses an extended EDAC check circuit and a read-write method for an extended Flash program storage area. A bus driver, an AND gate, an OR gate and a NOT gate are added between a processor interface and an extended FLASH and used for achieving read-write operation of the extended FLASH2. A data line D [0:7] and a check bit PD [0:7] are connected with a data line of a FLASH throughthe bus driver, and in order to prevent data line conflicts, an OE enabling end of the bus driver is controlled to be gated through GPIO5, GPIO6 and AND gate, OR gate and NOT gate combinational logic; the extended EDAC check circuit and the read-write method can be applied to the FLASH external expansion EDAC function in the space computer miniaturized SIP module; the function can effectively improve the single event upset resistance of the FLASH as a program storage area space; on the premise that the function performance of the whole machine is met, the single event upset resistance of theFLASH serving as a program storage area in the space environment is greatly improved, the reliability of the whole machine is improved, and the requirements for standardization, miniaturization and localization of space computer design are met.

Description

technical field [0001] The invention belongs to the application field of space embedded computers, and in particular relates to an externally expanded Flash program storage area expanded EDAC verification circuit and a reading and writing method. Background technique [0002] Miniaturization is the development trend of space embedded computers. At present, the processor system and functional modules in the computer are built with discrete components, which are large in size and heavy in weight. The development and application of SIP technology provides technical support for the miniaturization design of space embedded computer. The SIP module LSCCU01RH, which has been applied and successfully flown on the space computer, has greatly reduced the size, weight, and power consumption of the computer, and the module works stably, performs well, and has mature technology. [0003] The SIP module LSCCU01RH integrates resources such as CPU, SRAM, FLASH, and interface circuits, that...

AI Technical Summary

Problems solved by technology

In order to improve the adaptability of the space environment, the CPU and SRAM inside the SIP implement the EDAC (Error Detection And Correction) function of 32bits data lines and 8bits parity bits, and realize "correcting one and detecting two", which can improve the ability of space to resist single event flipping, but as Due to the complexity of the operation and the limitation of the internal space of the SIP, the FLASH of the program memory has only 32bits data lines, no parity bit, and cannot realize the EDAC function. As a program memory, there is a single event flip risk in the space application environment

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