Multi-channel silicon carbide JFET structure with grooves and preparation process thereof
A preparation process, silicon carbide technology, applied in semiconductor/solid-state device manufacturing, electrical components, transistors, etc., can solve the problems of large on-resistance, large conduction loss, inflexible current control, etc. The effect of pressure resistance
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[0034] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0035] refer to figure 1 , shows a flow chart of the preparation process steps of a double-channel silicon carbide JFET structure with grooves according to an embodiment of the present invention, including the following steps:
[0036] S1, growing a silicon carbide epitaxial layer on a silicon carbide substrate, wherein the doping type of the silicon carbide substrate and the silicon carbide epitaxial layer is the first conductivity type;
[0037...
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