Silicon-based junction accumulation layer and buffer layer lateral double-diffusion field effect transistor and manufacturing method thereof

Abstract

The invention discloses a silicon-based junction accumulation layer and buffer layer lateral double-diffusion field effect transistor and a manufacturing method thereof. The field effect transistor isprovided with an accumulation dielectric layer which covers a region between a P-type base region and an N+ drain region; an epitaxial layer is formed on the accumulation dielectric layer, two P-typeregions are formed at the left side end part and the right side end part of the epitaxial layer respectively through ion implantation, and an N+ region is formed in the epitaxial layer adjacent to the right end P-type region through ion implantation; a gate is formed on the surface of the gate dielectric layer, the gate is adjacent to the left-end P-type region; and a drain electrode is formed inthe right end region of the surface of the N+ drain region, and the drain electrode is adjacent to the right end P-type region. According to the invention, electrons can be generated through the junction accumulation layer structure, so that the on-resistance does not depend on the doping concentration, and the on-resistance of the device is greatly reduced. The electric field of the drift regionis modulated through the buffer layer, so that the electric field distribution is more uniform, and the device breakdown voltage can be greatly improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor power devices, in particular to a lateral double-diffused field effect transistor. Background technique [0002] Lateral Double-diffused MOSFET (LDMOS) has the advantages of easy integration, good thermal stability, good frequency, low power consumption, high switching speed, etc., and has become the choice of intelligent power circuits and high-voltage devices. core. With the growing market demand for portable power management and automotive electronics, LDMOS has received more and more attention. [0003] In the process of lateral device design, it is necessary to meet the conditions of the Reduced Surface Field (Resurf for short) technology, so that the breakdown point of the device is transferred from the surface to the body. However, as the length of the device drift region increases, the breakdown voltage of the device is mainly limited by the vertical withstand voltage capability in...

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Problems solved by technology

However, as the length of the device drift region increases, the breakdown voltage of the device is mainly limited by the vertical withstand voltage capability in the body, that is, due to the voltage saturation effect of the lateral power device, the breakdown voltage of the device gradually tends to saturation

In addition, as the withstand voltage level increases, the on-resistance increases significantly, which largely limits the application of LDMOS devices in the high-voltage field.

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