Reference level buffer suitable for pipelined ADC and pipelined ADC

Abstract

The invention relates to the technical field of mixed signal integrated circuits, in particular to a reference level buffer suitable for a pipelined ADC and the pipelined ADC. The reference level buffer comprises a reference generation circuit, an MDAC buffer circuit and a sub ADC buffer circuit, according to the invention, a bootstrap source follower structure is used as an output stage; a common-gate tube is connected in series between the source following tube and the power supply to reduce the drain-source voltage change of the source following tube, the linearity performance of the outputlevel is improved, aiming at different requirements of MDAC and sub ADCs in a pipeline stage on reference levels, the reference level buffer circuits of the sub ADC reference level network and the MDAC buffer circuit are separated, meanwhile, the mismatch compensation resistor matched with the equivalent resistance of the sub ADC reference level network is arranged between the output stages of the MDAC buffer circuit, the problem of static current mismatch is solved, and finally the reference level buffer which is high in speed, high in linearity and good in matching performance is obtained.

Description

technical field [0001] The invention relates to the technical field of mixed signal integrated circuits, in particular to a reference level buffer suitable for a pipelined ADC and a pipelined ADC. Background technique [0002] Analog-to-digital converter (ADC), as a "bridge" connecting analog and digital, is widely used in wireless broadband communication, high-speed data storage, and biomedical fields. In the field of wireless broadband communication, ADC plays a very important role in the receiver, and its performance is also one of the important factors restricting the performance improvement of the receiver system. In order to meet the bandwidth and dynamic range requirements of modern wireless broadband communications, research on high-speed and high-precision analog-to-digital converters has also become a hot topic. [0003] Pipeline ADC can achieve a better compromise between speed and precision, so it is widely used in the design of high-speed and high-precision ana...

AI Technical Summary

Problems solved by technology

As the sampling capacitor value and sampling rate increase, the power consumption of the reference level buffer will also increase

[0006] In addition, existing reference level buffer schemes usually have crosstalk between different sampling networks, reference level mismatch caused by resistive loads, sensitivity to power supplies, bias current source fluctuations caused by output transient currents, and Problems such as poor expansion flexibility of different reference levels

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