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Manufacturing method of semiconductor device

A technology for semiconductors and devices, which is applied in the field of semiconductor preparation, can solve problems such as the top-layer metal interconnect layer hillock shape, and achieve the effects of avoiding weak electrical connections, suppressing thermal strain, and improving yield and reliability

Active Publication Date: 2022-04-15
GUANGZHOU CANSEMI TECH INC
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Problems solved by technology

[0004] The purpose of the present invention is to provide a method for preparing a semiconductor device, so as to solve the problem that the top metal interconnection layer of the existing semiconductor device is prone to produce hillock defects after the hydrogen passivation process is performed

Method used

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  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device

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preparation example Construction

[0038] Figure 2a ~ Figure 2c It is a structural schematic diagram of corresponding steps in a method for preparing a semiconductor device. The fabrication method of the semiconductor device is as follows: Figure 2a As shown, a dielectric layer 200 and a top metal interconnect layer 300 are formed on the substrate 100; the top metal interconnect layer 300 is etched so that the top metal interconnect layer 300 has a set pattern; as Figure 2b As shown, a first passivation layer 401 and a second passivation layer 402 are sequentially formed on the top metal interconnection layer 300; Figure 2c As shown, the first passivation layer 401 and the second passivation layer 402 are etched to form an opening 500, and the opening 500 exposes part of the top metal interconnection layer 300 as a pad area.

[0039] Then a hydrogen passivation process is performed, which is to Figure 2c The wafer in the process is placed in a reaction chamber, and then the temperature of the reaction c...

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Abstract

The invention provides a method for preparing a semiconductor device. After the hydrogen passivation process is adjusted to form a second passivation layer on the first passivation layer, the second passivation layer and the first passivation layer are patterned. Previously, when the hydrogen passivation process was performed, the top metal interconnection layer was covered by the first passivation layer and the second passivation layer, and the first passivation layer and the second passivation layer could be used during the heating and cooling process of the hydrogen passivation process Fully suppress the thermal strain caused by the stress mismatch caused by the difference in thermal expansion coefficient of the top metal interconnection layer, prevent the top metal interconnection layer from producing hump-shaped defects, avoid the electrical connection between the top-layer metal interconnection layer and the package leads from being weak, and prevent the occurrence of hump-shaped defects. The void in the film avoids the tensile stress between the top metal interconnection layer and the conductive vias below, ensures the resistance integrity of the interconnection structure to the greatest extent, and improves the yield and reliability of the device.

Description

technical field [0001] The invention relates to the technical field of semiconductor preparation, in particular to a method for preparing a semiconductor device. Background technique [0002] In the manufacturing process of semiconductor devices, the whole process goes through hundreds of process steps to iterate the circuit on the surface of the substrate. The semiconductor device is formed on the substrate in the previous process, and the multi-layer metal interconnection layer is formed in the subsequent process, and then on the top layer A passivation layer is grown on the metal interconnection layer as a protective layer, and finally a pad region is etched at a position in the passivation layer that is interconnected with the outside. [0003] Since aluminum has good electrical conductivity, adhesion and ductility, most current metal interconnection technologies use aluminum interconnection technology. Due to the electromigration phenomenon of aluminum, after etching t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
CPCH01L21/76849H01L21/7685H01L21/76834
Inventor 韩瑞津曾辉
Owner GUANGZHOU CANSEMI TECH INC
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