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LDMOS device and manufacturing method thereof

A device and well region technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as low concentration, achieve the effect of improving performance, improving quasi-saturation phenomenon, and satisfying breakdown voltage

Active Publication Date: 2020-12-01
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
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  • Claims
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Problems solved by technology

[0003] Taking medium and high voltage NLDMOS devices as an example, an N-type deep well is formed in the substrate, and the N-type deep well is used to achieve a higher breakdown voltage. After thermal advancement, the N-type deep well will diffuse to become a drift region. However, the diffused The concentration of the drift region under the gate oxide layer is relatively light, which will cause the quasi-saturation phenomenon of the drain current (Id)-drain voltage (Vd) curve of the NLDMOS device

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  • LDMOS device and manufacturing method thereof
  • LDMOS device and manufacturing method thereof
  • LDMOS device and manufacturing method thereof

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Embodiment Construction

[0054] The technical solutions in this application will be clearly and completely described below in conjunction with the accompanying drawings. Apparently, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0055] In the description of this application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" etc. The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, or in a specific orienta...

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Abstract

The invention discloses an LDMOS device and a manufacturing method thereof, and relates to the field of semiconductor manufacturing. The LDMOS device comprises a substrate, and a first type deep trap,a first type well region and a second type well region which are arranged in the substrate, wherein the first type well region is located between the first type deep well and the second type well region, a first type heavily doped region is arranged at one end of the first type deep trap, a gate structure is arranged on the surface of the substrate, the first type well region is located below thegate structure, the gate structure is separated from the first type heavily doped region in the first type deep well through field oxygen, one end of the gate structure extends to the field oxygen surface above the first deep well, the other end of the gate structure is positioned above the second type well region, and a first type heavily doped region and a second type heavily doped region are arranged in the second type well region. According to the invention, the problem that an IDVD curve of an existing middle-high voltage LDMOS device has a quasi-saturation phenomenon is solved, and theeffect of improving the performance of the medium-high voltage LDMOS device is achieved.

Description

technical field [0001] The present application relates to the field of semiconductor manufacturing, in particular to an LDMOS device and a manufacturing method thereof. Background technique [0002] LDMOS (Laterally Diffused Metal Oxide Semiconductor) has the characteristics of high voltage resistance, high current drive capability, extremely low power consumption, and can be integrated with CMOS, and is widely used in power management circuits. [0003] Taking medium and high voltage NLDMOS devices as an example, an N-type deep well is formed in the substrate, and the N-type deep well is used to achieve a higher breakdown voltage. After thermal advancement, the N-type deep well will diffuse to become a drift region. However, the diffused The concentration of the drift region below the gate oxide layer is relatively light, which will lead to a quasi-saturation phenomenon in the drain current (Id)-drain voltage (Vd) curve of the NLDMOS device. Contents of the invention [...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/7816H01L29/0619H01L29/66681
Inventor 段文婷房子荃
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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