Germanium silicon-silicon through hole structure and preparation method thereof

Abstract

The invention provides a germanium silicon-silicon through hole structure and a preparation method thereof. The TSV structure comprises a composite substrate structure, a trench structure, an inductance structure and a copper interconnection structure, wherein the composite substrate structure is internally provided with a through hole structure which is conducted up and down, the composite substrate structure comprises a substrate layer, the top of the substrate layer is provided with a plurality of composite layers, and the composite layer comprises a germanium-silicon material layer and a silicon material layer; the inductance structure is arranged on the inner wall of the groove structure and the inner wall of the through hole structure, and the interior of the groove structure is completely filled with the inductance structure; the inductance structure is provided with a first top contact layer and a first bottom contact layer respectively, and the upper end and the lower end of the copper interconnection structure are connected with a second top contact layer and a second bottom contact layer respectively. Thus, the TSV structure prepared by the invention not only can realizevertical connection between chips, but also has an inductance structure with a high inductance value; and the performance of the TSV structure is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a silicon germanium-silicon through hole structure and a preparation method thereof. Background technique [0002] With the rapid development of integrated circuit technology, microelectronic packaging technology has gradually become the main factor restricting the development of semiconductor technology. In order to achieve high density of electronic packaging, obtain better performance and lower overall cost, technicians have developed a series of advanced packaging technologies. Among them, three-dimensional packaging technology has good electrical properties and high reliability, and can achieve high packaging density at the same time, and is widely used in various high-speed circuits and miniaturized systems. [0003] The Through Silicon Vias (TSV) technology is a new technology for stacking chips in a three-dimensional integrated circuit to realize the intercon...

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Problems solved by technology

[0004] However, the function of the currently prepared TSV structure is limited to the interconnection channel between the upper and lower chips, and has no other functions. As an important passive device in integrated circuits, inductors can be used to make filters and Oscillators, these devices require high inductance values, and the traditional TSV structure does not have an inductance structure with high inductance values

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