70 results about "Silicon silicon" patented technology

The invention relates to the technical field of high polymer materials, in particular to self-cleaning organic silicon foam with a micro-nano structure and a super-hydrophobic surface and a preparation method of the self-cleaning organic silicon foam. The surface structure of the release film is customized through one-step molding transfer printing, and a release agent of the release film contains a super-hydrophobic modified organic silicon light diffusion agent. The light diffusant is mainly silicon dioxide or organic silicon resin microspheres modified by surface long-chain silane. The surface structure of the customized release film is an inverted pyramid-shaped micro-nano structure. The organic silicon foam obtained according to the process has the surface micro-nano structure, super-hydrophobic and self-cleaning functions, and is particularly suitable for manufacturing daily and industrial pads such as mouse pads, table mats and placemats.

The invention provides a three-wafer bonding MEMS device and a preparation method thereof, the three-wafer bonding MEMS device comprises a first wafer, a second wafer, a third wafer, an insulating layer and a metal electrode, the first wafer comprises a plurality of first grooves, the bottom of each first groove is communicated with at least one silicon groove, and each silicon groove is filled with an insulating material; protruding silicon-silicon bonding platforms are arranged between the first grooves and inside the first grooves. The second wafer is connected with the first wafer through a silicon-silicon bonding platform, and a plurality of strip holes are formed in the second wafer; the third wafer comprises a plurality of second grooves; a limiting bulge can be arranged in the second groove; a raised eutectic bonding platform is arranged between the interior of the second groove and the second groove, and the third wafer is bonded with the second wafer; the insulating layer covers the first wafer; the plurality of metal electrodes are disposed on the insulating layer. According to the invention, the problem that the electrical parameters of the silicon-silicon bonding process cannot be tested and represented in the production and manufacturing of the MEMS device is solved.

The invention discloses a far-infrared silicon-based high-transmittance metasurface and a designing and processing method, and relates to the field of micro-nano optical devices. The metasurface is of a layered stacking structure with a hole-type metasurface atom array layer as a center layer, and an upper antireflection film layer, an upper substrate layer, the hole-type metasurface atom array layer, a lower substrate layer and a lower antireflection film layer are sequentially arranged on the metasurface from the incident side to the emergent side. Each of the upper antireflection film layer and the lower antireflection film layer comprises a first antireflection layer and a second antireflection layer which are sequentially arranged from inside to outside; the hole-type super-structure atom array layer, the upper substrate layer and the lower substrate layer are all made of monocrystalline silicon. According to the invention, the equivalent refractive index of the matching interface is designed through the sub-wavelength structure, the reflectivity of the far infrared band of 8-12 [mu] m is improved to 95% or more under the condition of no loss, the process route is simple, and the microstructure units of the surface of the super-structure are packaged and protected by using the silicon-silicon bonding process, so that the stability of the surface of the super-structure in processing and application is improved.

The present disclosure is applicable to the technical field of photovoltaics. Provided are an HBC cell, a cell assembly and a photovoltaic system. The HBC cell comprises: a silicon substrate, wherein the silicon substrate has a rear surface and a light-facing surface that are disposed opposite each other, first regions and second regions are alternately disposed on the rear surface of the silicon substrate, the first regions are polished regions, and the second regions are textured regions; and a first passivation layer, a first doped layer, a first conductive film layer and a first electrode that are stacked in sequence in each first region, and a second passivation layer, a second doped layer, a second conductive film layer and a second electrode that are stacked in sequence in each second region, wherein the first doped layer and the second doped layer are of different types, the first conductive film layer is not in communication with the second conductive film layer, and the width of the first electrode is less than the width of the second electrode. Increasing the width of a second electrode can improve the internal back-reflection capability of front incident light, thereby helping to improve the current output. The effect of contact resistance is reduced, thereby improving the transport efficiency of carriers.

The invention discloses a battery, an electrochemical device and a power utilization device.The battery comprises a battery cell, and the battery cell comprises a pole piece and a pole lug arranged on the pole piece; the lithium ion battery is characterized in that the negative electrode active material layer of the pole piece contains silicon, the percentage content of the silicon in the negative electrode active material layer is b, and the unit is%; the longest distance between the tab and the end part of the pole piece in the length direction is d, the width of the connecting position of the tab and the pole piece is m, and the units of d and m are the same; b, d and m meet the following relation:-3.1 < = < =-0.11. According to the method, the battery with relatively high energy density can be obtained by comprehensively controlling the value, and meanwhile, the battery can be ensured to have relatively good battery fast charging performance.

Provided herein hybrid organic-inorganic redox active materials and related composites, compositions, electrode materials, electrodes electrochemical cells, batteries, methods and systems, which, can be used as to provide high performance cathode active materials in high capacity, high energy density, safe, and long-lasting electrochemical cells and batteries when coupled with Li, Na, K, graphite, lithiated graphite, in situ lithiated graphite, silicon, lithiated silicon, in situ lithiated silicon, silicon-graphite, in situ lithiated silicon-graphite, hard carbon, sodiated hard carbon, graphite-silicone, lithiated graphite-silicon etc. anodes in non-aqueous electrolytes.

The application belongs to the technical field of additive manufacturing, and particularly discloses a wire for reducing light reflection in additive manufacturing of aluminum alloy and a method. The wire comprises an aluminum alloy wire and a silicon coating arranged on the surface of the aluminum alloy wire and used for reducing light reflection of the aluminum alloy wire. The method comprises the following steps: pre-treating the surface of the aluminum alloy wire; and preparing the silicon coating on the surface of the aluminum alloy wire after the surface pre-treatment, the silicon coating being used for reducing light reflection of the aluminum alloy wire. According to the application, a layer of elemental silicon is plated on the surface of the aluminum alloy wire. The silicon has good light absorption performance and belongs to the component of the aluminum alloy, and no other impurities are introduced, so that the high reflection problem of the aluminum alloy can be improved, and the forming quality can be effectively improved.

The invention provides a negative electrode material and a preparation method thereof, and a battery, the negative electrode material comprises an active substance, the active substance comprises silicon, a silicon oxide and a compound of a metal element M, the compound of the metal element M comprises a silicate of the metal element M and / or an oxide of the metal element M; the negative electrode material is measured through electron paramagnetic resonance, the g factor value of an electron spin resonance signal of oxygen atoms is X, and X is larger than or equal to 2.00601 and smaller than or equal to 2.00699; the oxygen vacancy intensity is Y, and Y is more than or equal to 10G and less than or equal to 400G. The negative electrode material provided by the invention has proper oxygen vacancies, a stable lithium ion channel exists in the battery cycle process, the expansion effect of the negative electrode material can be improved, and the cycle stability can be improved.

Methods of reducing wafer bowing in 3D DRAM devices are described using stacks including one or more of epitaxial silicon (Si), carbon doped silicon (SiC), silicon germanium (SiGe), and carbon-doped silicon germanium (SiGeC). A plurality of film stacks is formed on a substrate surface, each of the film stacks comprises two doped silicon layers having different dopant amounts and a sacrificial layer that may be doped or undoped. 3D DRAM devices are also described.

A barium carbonate slurry is sprayed onto the surface of the silicon nitride coating to form the barium carbonate coating. Using the above-mentioned barium carbonate-coated crucible, the probability of micron-level impurities in silicon ingots is significantly reduced during ingot production, decreasing from 8%-20% when using silicon nitride-coated crucibles to 0%. This effectively solves the technical problem of impurities in the ingot silicon production process and reduces the scrap rate of ingot silicon.

The present disclosure provides a negative electrode sheet, a cell, a battery, and an electric device. The negative electrode sheet comprises: a negative electrode current collector; a first active layer, arranged on at least one side surface of the negative electrode current collector, a negative electrode active material in the first active layer comprising first graphite and silicon-carbon; and a second active layer, arranged on the side of the first active layer away from the negative electrode current collector, a negative electrode active material in the second active layer comprising second graphite and silicon monoxide. The particle size of the silicon-carbon ranges from 4 μm to 7 μm. The active layers can be prevented from peeling off and falling off from the negative electrode current collector, ensuring that the battery formed from the negative electrode sheet has a high energy density, and enabling the negative electrode sheet to have good electrochemical performance and electrode sheet stability.

A negative electrode for an all-solid-state battery, an all-solid-state battery including the same, and a method of manufacturing a negative electrode for an all-solid-state battery are disclosed. The negative electrode includes a negative electrode current collector and a negative electrode active material layer. The negative electrode active material layer includes a negative electrode active material and a solid electrolyte. The negative electrode active material includes a porous support and silicon (Si). The silicon fills at least a portion of the pores of the porous support.

The invention belongs to the technical field of preparation of lithium battery negative electrode materials, and relates to a silicon-containing carbon material, preparation thereof and application of the silicon-containing carbon material in the lithium battery negative electrode materials, the silicon-containing carbon material contains carbon and silicon, the silicon is distributed in the carbon material, and the silicon-containing carbon material is provided with pore channels and / or holes. The preparation method comprises the following steps: reacting an aromatic hydrocarbon-containing raw material in the presence of silicon tetrachloride, pre-oxidizing and carbonizing. The silicon-silicon-carbon material is used as a lithium battery negative electrode material, and is relatively high in capacity and relatively good in stability.

The present invention relates to a carbon-silicon-silicon / carbon composite comprising: a carbon-silicon composite including silicon disposed inside pores of a porous carbon support; and a silicon / carbon composite matrix disposed on the surface of the carbon-silicon composite, and a manufacturing method therefor. According to the present invention, the overall silicon size can be suppressed to be small, and the formation of Crystal-LixSiy (for example, Li15Si4 or Li3.75Si), which is an intermediate phase affecting the deterioration of battery performance, is suppressed, thereby mitigating the deterioration of battery performance during repeated charge–discharge cycles.

The invention discloses a silicon through hole sandwich cavity MEMS wafer level packaging method and a packaging body thereof, and belongs to the technical field of semiconductor chip packaging. Comprising an MEMS chip, an ASIC carrier plate chip, a cap wafer chip, an embedded interconnection mechanism, an upper silicon wafer bonding layer, a lower silicon wafer bonding layer, a silicon through hole, a step, a step bonding pad, a substrate, a plastic package shell, a plastic package shell cavity and an MEMS chip cavity. Through silicon via, wafer-level silicon-silicon bonding, lead bonding, SMT surface mounting technology, dry etching, chip inner cavity preparation and other technologies are comprehensively adopted, and low-cost and high-feasibility three-dimensional and miniaturized integration of the inertial MEMS chip is achieved. The problems that in an existing inertial MEMS chip three-dimensional integration technology, a wafer level scheme is complex in technology, high in initial cost, expensive in technology and equipment, poor in mechanical stress sensitivity, difficult in calibration test and low in maintainability are solved. The method is widely applied to the technical field of high-integration-density and high-power 3D packaging.

The utility model discloses a double crossbeam silicon core structure belongs to polycrystal silicon production technical field, including upper silicon core bridge beam, lower silicon core bridge beam and two silicon core column bodies. The upper silicon core bridge beam both ends are equipped with first radial hole, and are connected with the top of silicon core column body, and the second radial hole is equipped with to two silicon core column bodies same height, and is connected with the both ends of lower silicon core bridge beam. The technical scheme forms the rectangular frame through double crossbeam, and improves structural stability, and the lower crossbeam realizes current shunt, and reduces the current density of upper portion, and balances upper and lower temperature, solves the uneven growth of silicon rod, crossbeam angle melting problem, and adopts silicon - silicon homogeneity connection to avoid impurity pollution, and adapts polycrystal silicon production demand.

The invention relates to high-plasticity high-silicon silicon steel and a preparation method and application thereof, and belongs to the technical field of soft magnetic material manufacturing. The high-plasticity high-silicon silicon steel comprises the following chemical components: 3.5-6.6% of Si, 0.5-2.0% of Al, 0.02-0.1% of B, 0.03-0.06% of Zr, 0.1-0.5% of Mn, less than or equal to 0.005% of C, less than or equal to 0.003% of S, less than or equal to 0.004% of P, less than or equal to 0.003% of N, less than or equal to 0.003% of O and the balance of Fe and inevitable impurities. Through mutual cooperation of the elements, especially the addition of the B and Zr elements, grains are refined, the content of ordered phases is reduced, the plasticity of the high-silicon silicon steel is improved, and the obtained high-silicon silicon steel does not have brittle fracture; and meanwhile, the high-silicon silicon steel with high magnetic induction intensity, low iron loss and excellent thickness tolerance and surface quality is obtained.

The invention relates to a light photovoltaic module backboard flame-retardant coating and a preparation method thereof. Raw materials of the coating comprise the following components: aliphatic polyurethane acrylate, a phosphoric acid modified methacrylic acid oligomer, an intumescent flame retardant, polysiloxane, polysilazane, methyl phenyl silicone resin, MQ resin, hollow titanium dioxide, hollow ceramic microspheres, a silicate ceramic agglutinant, a curing agent, an ultraviolet light absorber, a leveling wetting agent, an antioxidant and a solvent. The components of the flame-retardant coating form a plurality of synergistic effects such as expansion-ceramic synergy, phosphorus-silicon synergy and silicon-silicon synergy, so that the coating realizes efficient flame retardance, high carbonization residue, high heat insulation and excellent mechanical properties.

The invention discloses an application of a germanium-silicon etching solution. The invention specifically discloses an application of a germanium-silicon etching solution in etching a sacrificial layer in a GAA MOSFET (Good Acrylic Acid Metal-Oxide-Semiconductor Field Effect Transistor) structure. The germanium-silicon etching liquid is prepared from the following components in percentage by mass: 0.1%-5% of fluoride, 5%-70% of an oxidizing agent, 0.1%-2% of a wetting agent, 0.1%-2% of a complexing agent and a solvent, the sum of the mass fractions of all the components is 100%, and the mass fractions are the percentage of the mass of all the components in the total mass of the germanium-silicon etching liquid. When the germanium-silicon etching liquid is used for etching a sacrificial layer in a GAA MOSFET structure, high-selectivity etching of germanium-silicon / silicon can be achieved, and the etching effect is good and uniform.

The invention provides a bonding method and a bonding structure, and belongs to the technical field of semiconductors. The method comprises the steps that a first silicon substrate and a second silicon substrate are provided, and the to-be-bonded surfaces of the first silicon substrate and the second silicon substrate have the same crystal orientation; forming a first groove structure on the first silicon substrate, and forming a second groove structure on the second silicon substrate; forming an atomic-scale intermediate layer on the to-be-bonded surfaces of the first silicon substrate and the second silicon substrate, wherein the thickness of the atomic-scale intermediate layer is any one of 1 nm and 3 nm; and carrying out bonding treatment on the first silicon substrate and the second silicon substrate, so that the groove structures are aligned and an insulation region or a closed region is formed, and a target bonding structure is obtained. According to the method, the defects of insufficient silicon-oxygen bonding strength and high virtual connection rate are overcome, meanwhile, cracking and failure caused by surface roughness and local defects of pure silicon-silicon bonding are avoided, and the interface bonding problem of the inertial sensor under the high reliability requirement is solved.

A semiconductor device includes an active structure on a substrate, the active structure including a silicon germanium pattern and a silicon pattern alternately and repeatedly stacked in a vertical direction perpendicular to an upper surface of the substrate; a semiconductor layer on a sidewall of the active structure facing in a first direction parallel to the upper surface of the substrate, the semiconductor layer being a source / drain region; and a gate structure on a surface of the active structure and the substrate, the gate structure extending in a second direction perpendicular to the first direction, wherein the silicon germanium pattern is silicon-rich silicon germanium.

The invention relates to a method and a system for improving 3D NAND etching efficiency by using silicon / silicon germanium stack replacement. According to the method, silicon (Si) and silicon germanium (SiGe) stacking is adopted to replace traditional ONON stacking. As the silicon and the silicon germanium have lower bonding energy and higher reaction activity, the method can simplify and accelerate the etching process, and can also realize effective layer replacement at the same time to complete the formation of the electrical isolation layer and the grid electrode. According to the method, the manufacturability and continuity of the high-density 3D NAND device can be improved.

The application provides a monolithic integrated multifunctional composite sensor and a preparation method thereof, and adopts single-silicon single-surface silicon microfabrication technology to predefine and cover a first micro groove of a gas flow sensing unit, to form a pressure reference cavity and a pressure sensitive diaphragm first, to predefine a single-crystal silicon thermocouple arm and a heating resistor pattern through the first micro groove and a side wall protection, to protect the pressure sensing unit through a heat insulation medium layer, to form a heat insulation cavity and a temperature sensing unit, to finally realize integration of the gas flow sensing unit, the pressure sensing unit and the temperature sensing unit on the same monolithic wafer, and to realize the structure of the heat insulation cavity and the pressure reference cavity in the same single-crystal silicon substrate. The method replaces traditional double-sided processing technology, solves the problem that a traditional composite chip is difficult to realize small size, avoids a complex process caused by a traditional silicon-silicon or silicon-glass bonding structure, greatly reduces process difficulty and cost, improves the yield of the composite chip, and improves the reliability of the sensor.

The invention provides a high-silicon silicon-manganese alloy smelting method which comprises the following steps: smelting uniformly mixed smelting raw materials added into a submerged arc furnace through the submerged arc furnace to obtain first high-silicon silicon-manganese alloy liquid; wherein in the process of smelting the uniformly mixed smelting raw materials added into the submerged arc furnace through the submerged arc furnace, the resistance value of the electrode of the submerged arc furnace is obtained in real time; the voltage of the secondary side of the submerged arc furnace transformer and the current of the submerged arc furnace electrode are adjusted according to the resistance value of the submerged arc furnace electrode so as to ensure that the resistance value of the submerged arc furnace electrode is larger than a first preset threshold value, and in the process, the alkalinity in the submerged arc furnace is a second preset threshold value; transferring the first high-silicon silicon-manganese alloy liquid into a ladle, standing for a first preset time, and slagging off the first high-silicon silicon-manganese alloy liquid to obtain a second high-silicon silicon-manganese alloy liquid; and the second high-silicon silicon-manganese alloy liquid is poured into a mold for ingot casting, and a high-silicon silicon-manganese alloy finished product is obtained. The power consumption cost in the smelting process of the high-silicon silicon-manganese alloy is low, and the purity of the finished product of the high-silicon silicon-manganese alloy is improved.

The utility model discloses a refrigeration structure and a packaging structure of a two-dimensional array type silicon detector. The refrigeration structure comprises a silicon-based bottom plate, a silicon-based splitter plate, a cover plate and two water receiving pipes. A first layer of micro-channel is formed between the silicon-based bottom plate and the silicon-based splitter plate through a silicon-silicon bonding process; the silicon-based splitter plate and the cover plate form a second-layer micro-channel through anodic bonding, and the second-layer micro-channel is used for distributing the inflow cooling medium and receiving the backflow cooling medium for each channel in the first-layer micro-channel; the two water receiving pipes are connected with the cooling medium input port and the cooling medium output port in the cover plate respectively and used for providing circulating cooling media for the micro-channel radiator. The refrigeration structure aims to reduce detection dead zones among the modules in the detector and realize efficient and uniform refrigeration of the detector modules.

[Problem] The present application has an object to provide a novel polishing composition which can reduce the residue of a polishing object such as polysilicon to be polished and also can suppress dishing. [Solution] A polishing composition which is a polishing composition containing colloidal silica, an alkali metal salt, and water, and has a pH of 9.0 to 11.5, wherein (i) the polishing composition is used in a process of polishing a second layer to expose a first layer in a polishing object having the first layer provided with a recess and the second layer formed so as to fill the recess, the first layer being selected from a layer having an oxygen-silicon bond or a layer having a nitrogen-silicon bond, the second layer having a silicon-silicon bond; and / or (ii) the colloidal silica has a silanol group number of 6 / nm 2 or more and 22 / nm 2 or more and 22 / nm

Provided in the present application are a negative electrode material and a battery. The negative electrode material comprises a silicon-based active substance and a carbon material located on at least part of the surface of the silicon-based active substance, and the silicon-based active substance comprises silicon, a silicon oxide and a metal M compound; the negative electrode material is subjected to a Lab color difference test, so as to obtain the brightness L, the red-green chromaticity a and the yellow-blue chromaticity b of the negative electrode material, wherein 15≤L≤35, -2≤a≤5, and -2≤b≤5; in an XRD pattern of the negative electrode material, the full width at half maximum of the strongest characteristic peak of the metal M compound in the negative electrode material is FWHM(M), and the full width at half maximum of the characteristic peak of a silicon (111) plane is FWHM(si), wherein 0.2<FWHM(M) / FWHM(si)<0.8. The negative electrode material provided in the present application can improve the initial Coulombic efficiency and cycle stability of the negative electrode material, and reduce the expansion efficiency of the negative electrode material.

The chip and heat dissipation structure device comprises a first silicon wafer and a second silicon wafer which are mutually attached and overlaid, a micro-channel array is arranged on the back face of the first silicon wafer, and a micro-channel array arrangement area is formed; a pit is formed in the front face of the second silicon wafer, a liquid inlet penetrating through the bottom wall of the pit is formed in the pit, mutual silicon-silicon bonding is achieved between the back face of the first silicon wafer and the front face of the second silicon wafer, and the front face of the bonded first silicon wafer is thinned. An internal cavity is formed between the bonded first silicon wafer and the bonded second silicon wafer and between the micro-tube channel array of the first silicon wafer and the concave pit of the second silicon wafer, and the internal cavity is filled with cooling liquid through a liquid inlet; after the cooling liquid is filled, the liquid inlet is closed, and the inner cavity becomes a closed liquid storage cavity; the chip is prepared on the front surface of a first silicon wafer which is thinned after bonding; the invention also provides a manufacturing method of the chip and the heat dissipation structure device thereof, and a chip heat dissipation method.

1. The name of the design product: two-way tilting device. 2. The use of the design product: the design product can be used as a component on a tilting machine for cement pouring and metallurgical pouring of ferroalloy, industrial silicon, and silicon-aluminum alloy in construction engineering. 3. The design points of the design product: in shape. 4. The picture or photo that best indicates the design points: perspective view 1.