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Back gold process of semiconductor device

A back gold process, semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, metal material coating processes, etc., can solve the problems of etching time affecting production efficiency, not conducive to saving production costs, and difficult process control, etc. Achieve the effect of reducing the amount of etching solution, shortening the etching time, and easy control

Pending Publication Date: 2021-04-13
XIAMEN SANAN INTEGRATED CIRCUIT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the semiconductor device in the prior art obtains the above-mentioned area not covered by the metal layer by etching the metal layer on its back side. Since the thickness of the metal layer is relatively large (generally 3-5 μm), the etching time is relatively long. Long, the process is not easy to control, and sometimes it is easy to etch not clean and needs to be re-etched
Moreover, too long etching time affects production efficiency; the amount of etching solution is large, which is not conducive to saving production costs

Method used

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  • Back gold process of semiconductor device
  • Back gold process of semiconductor device
  • Back gold process of semiconductor device

Examples

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Effect test

Embodiment Construction

[0029] Examples, see Figure 1-Figure 6 Shown, the back gold process of a kind of semiconductor device of the present invention comprises the following steps:

[0030] 1) Sputtering the first thin metal layer 2 on the back of the semiconductor device 1, such as figure 1 as shown, figure 1 The middle semiconductor device 1 is a simple illustration;

[0031] 2) Coating a photoresist on the first metal thin layer 2 to obtain a photoresist layer 3, such as figure 2 shown;

[0032] 3) The photoresist layer 3 is sequentially exposed and developed, so that the surface of the first metal thin layer 2 forms an electroplating region 21 not covered by the photoresist layer 3 and an etching region 22 covered by the photoresist layer 3, as image 3 shown;

[0033] 4) performing sputtering and / or electroplating in the electroplating area 21 to obtain the second metal layer 4, such as Figure 4 shown;

[0034] 5) removing the photoresist layer 3 on the etching region 22, such as Fi...

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Abstract

The invention discloses a back gold process of a semiconductor device. The back gold process comprises the following steps of 1) sputtering a first metal thin layer on the back surface of the semiconductor device, 2) coating a photoresist on the first metal thin layer to obtain a photoresist layer, 3) sequentially exposing and developing the photoresist layer to form an electroplating area which is not covered by the photoresist layer and an etching area which is covered by the photoresist layer on the surface of the first metal thin layer, 4) sputtering and / or electroplating in the electroplating area to obtain a second metal layer, 5) removing the photoresist layer on the etching area, and 6) removing the first metal thin layer in the etching area through etching. When the method is used for etching, only the first metal thin layer needs to be etched, so that the etching thickness is greatly reduced, etching process parameters are easier to control, the situation that supplementary etching needs to be carried out due to incomplete etching is greatly reduced or avoided, meanwhile, the etching time is greatly shortened, and the production efficiency is improved; and the amount of etching liquid required for etching is reduced, so that the production cost is reduced.

Description

technical field [0001] The invention relates to a semiconductor device processing technology, in particular to a semiconductor device back gold technology. Background technique [0002] For semiconductor devices (such as heterojunction bipolar transistors, etc.), the back-gold process is an indispensable process in its production. Through back-gold treatment, a certain thickness of metal layer is attached to the back of the semiconductor device. And the area not covered by the metal layer, the area not covered by the metal layer is generally used as a cutting line to avoid cutting tool wear and reduce back gold stress, and the area not covered by the metal layer can also be an insulating area to prevent leakage. At present, the semiconductor device in the prior art obtains the above-mentioned area not covered by the metal layer by etching the metal layer on its back side. Since the thickness of the metal layer is relatively large (generally 3-5 μm), the etching time is relat...

Claims

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Application Information

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IPC IPC(8): H01L21/283H01L21/288H01L29/737C23C14/04C23C14/18C23C28/02C25D5/02
CPCH01L21/283H01L21/288H01L29/737C23C14/185C23C14/042C25D5/022C23C28/021
Inventor 蔡文必其他发明人请求不公开姓名
Owner XIAMEN SANAN INTEGRATED CIRCUIT