Comparator circuit and RS485 receiver circuit

Abstract

The invention discloses a comparator circuit and an RS485 receiver circuit. The comparator is used for receiving a first signal voltage and a second signal voltage, the amplitudes of the signal voltages of the first signal voltage and the second signal voltage are not completely symmetrical, and the comparator circuit comprises a first-stage gain unit, a first-stage level conversion unit, a second-stage gain unit and a second-stage level conversion unit. A two-stage cascade structure is constructed, so that corresponding nodes become low-impedance nodes, the delay of a signal level can be effectively reduced, the problem of communication failure due to the fact that a circuit is easily affected by mismatching of rising edge delay and falling edge delay is solved, and under the condition that input signals are asymmetric, a relatively small delay difference between the rising edge and the falling edge can still be realized.

Description

technical field [0001] The invention belongs to the field of integrated circuit design, in particular to a comparator circuit and an RS485 receiver circuit. Background technique [0002] RS-485 is a low-cost and reliable communication specification, which is widely used in industrial control, communication equipment, smart meters, inverter power supplies, security monitoring and other fields. The RS-485 interface defines the electrical characteristics of the corresponding interface. In high-speed RS485 applications, the transmission signal voltage cycle is very short, and the rising and falling edges of the signal voltage account for a large proportion in the entire cycle. If the rising edge delay and falling edge delay do not match, the duty cycle of the signal voltage The ratio will obviously change and affect the communication of the signal voltage. The receiver circuit in the existing RS485 transceiver is very susceptible to the influence of the mismatch between the risi...

AI Technical Summary

Problems solved by technology

[0003] The technical problem to be solved by the present invention is to overcome the defect that the RS485 receiver circuit in the prior art is easily affected by the mismatch of signal voltage rising edge delay and falling edge delay in high-speed applications, resulting in failure of serial transmission data, providing A comparator circuit and RS485 receiver circuit

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