Power chip stacking and packaging structure

A packaging structure and power chip technology, which is applied to semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve the problems of large packaging structure size, difficult chip interconnection electrodes, poor heat dissipation performance, etc., to achieve Excellent heat dissipation performance, wide application range, size reduction effect

Active Publication Date: 2021-04-23
GREAT TEAM BACKEND FOUNDRY (DONGGUAN) LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The existing power chip stack package structure, one is to package different chips in different packages, then stack the packages, and realize the interconnection between multiple chips through perforation, solder balls, etc. to form the final whole Packaging structure: In this power chip stacking packaging structure, each chip needs a substrate to carry, and each chip needs to be packaged. The size of the packaging structure is large, which is not conducive to the miniaturization design of the product
[0004] Another power chip stack package structure, two or more chips are packaged in the same package, and the electrodes of the chips are electrically connected to the pins thr

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0067]Embodiment 1: The first chip 20 is a triode chip, and the second chip 40 is a diode chip; the two sides of the triode are respectively provided with the source 21 and the drain, and the diode chip is provided with anode and cathode 41, respectively; the first electrode For the source 21, the second electrode is the drain, the third electrode is the cathode 41, and the fourth electrode is an anode.

[0068]When the power chip stacking package structure is applied, in the circuit of the triode chip and the circuit board 80, the parallel diode chip, the cathode 41 of the diode chip, and the cathode 41 of the diode chip can be turned off through the diode chip.

[0069]In the present embodiment, the triode chip is used as the first chip 20. Thus, the source 21 is welded to the metal sheet 10, and when the metal sheet 10 can be directly welded to the upper circuit board 80, the source 21 and the circuit board 80 are connected. .

[0070]When the power chip stack package is applied, the sour...

Example Embodiment

[0071]Embodiment 2: The first chip 20 is a diode chip, and the second chip 40 is a triode chip; the two sides of the triode are respectively provided with the source 21 and the drain, and the diode chip is provided with anode and cathode 41, respectively; the first electrode For the anode, the second electrode is the cathode 41, the third electrode is the drain, the fourth electrode is the source 21.

[0072]The triode chip as described in the present invention may be, but is not limited to, a MOSFET chip; a triode chip is a switching device.

[0073]In an embodiment, the first chip 20 is a triode chip, the first electrode being the source 21, the second electrode being the drain; the first chip 20 further includes and the Gate 23 copied by the source 21;

[0074]The lead frame further includes a third tube pin 34 insulated from the island 31, the gate 23 electrically connected to the third tube foot 34 by a metal wire 62; or the power chip stacking package structure Including a conductive s...

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Abstract

The invention discloses a power chip stacking and packaging structure. The power chip stacking and packaging structure comprises a metal sheet, a first chip, a lead wire frame and a second chip which are stacked in sequence to form a stacking structure, and a packaging body for packaging the stacking structure, wherein the lead wire frame comprises a base island, a first pin electrically connected with the base island, and a second pin insulated from the base island; two opposite sides of the first chip are provided with a first electrode and a second electrode, and two opposite sides of the second chip are provided with a third electrode and a fourth electrode; the metal sheet and the first electrode, the second electrode and the base island, and the base island and the third electrode are respectively combined through conductive combination layers; the fourth electrode is electrically connected with the second pin; and the front surface of the metal sheet, a part of the first pin and a part of the second pin are exposed out of the package body. According to the power chip stacking and packaging structure, the two chips are fixed on the two opposite sides of the lead wire frame for stacking and packaging, and the metal sheets are exposed, so that the size of the packaging structure is reduced, and meanwhile, the packaging structure has better heat dissipation performance.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a power chip stack package structure. Background technique [0002] At present, the development trend of semiconductor packaging is developing towards the direction of multi-chip packaging. Stacked package is a type of multi-chip package. Small package size and good heat dissipation performance are the development trend of power chip stack package structure. [0003] The existing power chip stack package structure, one is to package different chips in different packages, then stack the packages, and realize the interconnection between multiple chips through perforation, solder balls, etc. to form the final whole Packaging structure: In this power chip stacking packaging structure, each chip requires a substrate to carry, and each chip needs to be packaged. The size of the packaging structure is large, which is not conducive to the miniaturization design of the product. ...

Claims

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Application Information

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IPC IPC(8): H01L23/367H01L23/492H01L23/495H01L25/18
CPCH01L23/367H01L25/18H01L23/492H01L23/495H01L23/488H01L25/00H01L2224/40245H01L2224/48247H01L2224/32245H01L2224/0603H01L2924/181H01L2224/73221H01L2924/00012
Inventor 王琇如唐和明郑明祥黄源炜曹周
Owner GREAT TEAM BACKEND FOUNDRY (DONGGUAN) LTD
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