Three-dimensional memory device, manufacturing method thereof and electronic device

A technology of three-dimensional storage and manufacturing methods, applied in semiconductor devices, electrical solid devices, circuits, etc., can solve problems such as rising process costs, restricting the development of 3D NAND flash memory technology, and difficulty in realizing epitaxial growth processes, etc.

Inactive Publication Date: 2021-04-30
GUANGHUA LINGANG ENG APPL & TECH R&D (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] In order to obtain a larger storage capacity per unit chip area, the number of stacked structures in 3D NAND flash memory is required to increase, and the height of the stacked structure continues to increase, which makes it more and more difficult to form channels in three-dimensional memories. , the process cost rises, which seriously restricts the development of 3D NAND flash memory te

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  • Three-dimensional memory device, manufacturing method thereof and electronic device
  • Three-dimensional memory device, manufacturing method thereof and electronic device
  • Three-dimensional memory device, manufacturing method thereof and electronic device

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Embodiment Construction

[0056] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0057] It should be understood that the invention can be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.

[0058] It will be understood that when an element or layer is referred t...

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Abstract

The invention discloses a three-dimensional memory device, a manufacturing method thereof and an electronic device. The manufacturing method comprises the following steps: providing a substrate; doping the substrate to form a source electrode; forming a control gate stack structure on the substrate, wherein the control gate stack structure comprises a plurality of interlevel dielectric layers and control gate layers which are stacked in a staggered manner, the control gate layers are formed between adjacent interlevel dielectric layers, the control gate layers comprise transition metal sulfide; patterning the control gate stack structure to form a hole exposing the source electrode in the control gate stack structure; forming a charge trapping layer on the side wall of the hole; depositing a channel material layer to fill the hole; and forming a drain electrode on the control gate stack structure. According to the manufacturing method of the three-dimensional memory device provided by the invention, the height of the control gate stack structure can be effectively reduced, so that the difficulties of forming a channel, depositing in the channel and the like are reduced.

Description

technical field [0001] The invention relates to the field of electronic storage, in particular to a three-dimensional storage device, a manufacturing method thereof, and an electronic device. Background technique [0002] With the development of planar flash memory, the production process of semiconductors has made great progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, existing development technology limits, and storage electron density limits. In this context, in order to solve the difficulties encountered in planar flash memory and to seek lower production costs per unit storage unit, various three-dimensional (3D) memory structures have emerged, such as 3D NOR (3D or not) flash memory and 3D NAND (3D NAND) flash memory. Wherein, in the 3D flash memory of the NOR structure, memory cells are arranged in parallel between the bit line and the ground line, while in the 3D flash memory of the NAND ...

Claims

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Application Information

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IPC IPC(8): H01L27/11568H01L27/11582
CPCH10B43/30H10B43/27
Inventor 孔繁生周华
Owner GUANGHUA LINGANG ENG APPL & TECH R&D (SHANGHAI) CO LTD
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