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Substrate preparation method and substrate structure, chip packaging method and chip packaging structure

A substrate preparation and substrate technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve the problem that the depth of openings is not easy to control, the conductive circuit of the chip is easy to be damaged, and the yield rate of the chip packaging structure is affected To achieve the effect of improving the stability of interface bonding, improving the efficiency of opening holes, and reducing warpage

Active Publication Date: 2022-08-05
广东佛智芯微电子技术研究有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

During the opening process, the depth of the opening is not easy to control, and it is easy to damage the chip or break down other conductive lines, which affects the yield of the chip packaging structure

Method used

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  • Substrate preparation method and substrate structure, chip packaging method and chip packaging structure
  • Substrate preparation method and substrate structure, chip packaging method and chip packaging structure
  • Substrate preparation method and substrate structure, chip packaging method and chip packaging structure

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0104] The chip packaging method of this embodiment includes the following steps:

[0105] S10, prepare the first sub-substrate:

[0106] S10a, providing a first glass substrate 11, pasting a first photosensitive dry film on one side of the first glass substrate 11, and forming several windows after exposure and development;

[0107] S10b, performing laser focusing modification on the first glass substrate 11 exposed to the window, and then using a hydrofluoric acid solution to etch the laser focusing modified region to obtain a TGV through hole 12 penetrating the first glass substrate 11, refer to figure 1 ;

[0108] S10c, forming the first conductive pillars 13 in the TGV through holes 12 by electroplating, and making the two end faces of the first conductive pillars 13 flush with the two sides of the first glass substrate 11 respectively, and then removing the remaining first photosensitive dry film ,refer to figure 2 ;

[0109] S20, prepare the second sub-substrate:

...

Embodiment 2

[0139] The chip packaging method of this embodiment is basically the same as the above-mentioned first embodiment, and the difference lies in the substrate preparation method. The substrate preparation method specifically includes the following steps:

[0140] S10, prepare the first sub-substrate:

[0141] S10a, providing a first glass substrate 11, pasting a first photosensitive dry film on one side of the first glass substrate 11, and forming several windows after exposure and development;

[0142] S10b, performing laser focusing modification on the first glass substrate 11 exposed to the window, and then etching the laser focusing modified region with an ammonium hydrogen fluoride solution to obtain a TGV through hole 12 penetrating the first glass substrate 11, refer to figure 1 ;

[0143] S10c, forming a first conductive column 13 in the TGV through hole 12 by electroplating, and making one end surface of the first conductive column 13 flush with one side of the first gl...

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Abstract

The invention discloses a substrate preparation method, a substrate structure, a chip packaging method and a chip packaging structure, wherein the substrate preparation method comprises: providing a first glass substrate, embedding a plurality of first conductive pillars in the first glass substrate, and making The two end faces of the first conductive column are exposed on both sides of the first glass substrate along the thickness direction thereof, respectively, to obtain a first sub-substrate; a second glass substrate is provided, and a circuit groove and a circuit groove are provided on one side of the second glass substrate. A number of via holes penetrating the second glass substrate are opened in the circuit groove, second conductive pillars are formed in the via holes, and a first redistribution layer connected to the second conductive pillars is formed in the circuit groove to obtain a second sub-substrate ; The first sub-substrate and the second sub-substrate are bonded together, and the first conductive column is electrically connected with the first redistribution layer to obtain a substrate structure. The conductive circuit of the substrate structure prepared by the method has good connection stability, and the preparation method is simple, and the subsequent chip mounting is convenient, and the product yield is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a substrate preparation method and substrate structure, a chip packaging method and a chip packaging structure. Background technique [0002] With the trend of miniaturization and integration of electronic products, the high density of microelectronic packaging technology has gradually become the mainstream in the new generation of electronic products. In order to adapt to the development of a new generation of electronic products, especially the development of mobile phones, notebooks, smart wearable devices and other products, chips are developing in the direction of higher density, faster speed, smaller size and lower cost. [0003] During the packaging process, due to the difference in thermal expansion coefficients of plastic, silicon and metal materials, the volume changes of these materials are not synchronized, resulting in stress and warpage. Among them, the...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/48H01L23/498
CPCH01L21/486H01L21/4857H01L23/49822H01L23/49833H01L23/49827H01L23/49838H01L2224/02331H01L2224/02381H01L2224/02379H01L2224/02333
Inventor 杨斌崔成强罗绍根
Owner 广东佛智芯微电子技术研究有限公司
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