LDO circuit

Abstract

An LDO circuit comprises an LDO main body circuit and an anti-overshoot circuit; the anti-overshoot circuit is connected between the output end of the LDO main body circuit and the ground, the control end of the anti-overshoot circuit is connected with the input end of the LDO main body circuit, and under the condition that the input end of the LDO main body circuit receives input voltage initially, the output end of the LDO main body circuit is communicated with the ground in response to the input voltage received by the control end of the LDO circuit, so that the output voltage output by the output end of the LDO circuit is low level, overshoot of the output voltage output by the output end of the LDO circuit when a power supply is powered on is restrained, and then the condition of overvoltage of an external circuit connected with the output end of the LDO circuit is avoided. Besides, the anti-overshoot circuit does not comprise a resistance device, a larger circuit area does not need to be increased, extra power consumption is not increased, and therefore output voltage overshoot of the LDO circuit is well restrained under the condition that the cost of the circuit is extremely low.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to an LDO circuit. Background technique [0002] Low Dropout Regulator (LDO) has the advantages of simple structure, low cost, low noise, low power consumption and small package size, so LDO is widely used in portable electronic devices. [0003] figure 1 It is a structural schematic diagram of an existing LDO circuit. Such as figure 1 As shown, the LDO circuit includes an error amplifier unit A11, an adjustment transistor M11, an adjustment transistor M12, an adjustment transistor M13 and a current source I1. One input terminal of the error amplifier unit A11 receives the output voltage Vo output from the output terminal of the LDO circuit, and the other input terminal receives the reference voltage Vref. In the LDO circuit, the output voltage Vo is equal to the reference voltage Vref, which can be applied to low-power consumption In the application scenario, howeve...

AI Technical Summary

Problems solved by technology

One input terminal of the error amplifier unit A11 receives the output voltage Vo output from the output terminal of the LDO circuit, and the other input terminal receives the reference voltage Vref. In the LDO circuit, the output voltage Vo is equal to the reference voltage Vref, which can be applied to low-power consumption In the application scenario, however, as the current of each branch in the LDO circuit decreases, the output voltage Vo is prone to overshoot during the power-on process of the power supply VDD. In this case, the external circuit connected to the output of the LDO circuit It may be in an instantaneous overvoltage situation, which is very easy to cause damage to the external circuit

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