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Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve the problem of low coupling capacitance

Pending Publication Date: 2021-09-14
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
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  • Application Information

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Problems solved by technology

[0004] The object of the present invention is to provide a semiconductor device and a semiconductor manufacturing method to solve the problem of low coupling capacitance between the control gate and the floating gate in the semiconductor device

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

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Embodiment Construction

[0048] A semiconductor device and a semiconductor manufacturing method proposed by the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention. In addition, the structures shown in the drawings are often a part of the actual structure. In particular, each drawing needs to display different emphases, and sometimes uses different scales.

[0049] figure 1 is a schematic structural view of a semiconductor device according to an embodiment of the present invention. Such as figure 1 As shown, the semiconductor device in this embodiment includes a substrate 1, a floating gate layer 3 and a ...

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Abstract

According to a semiconductor device and a manufacturing method thereof, a barrier layer is at least formed between a sacrificial layer and a first side wall, so that when the sacrificial layer is removed through etching, the barrier layer can prevent etching liquid from corroding the first side wall, the first side wall is further ensured not to shrink inwards, when a control gate layer and a floating gate layer are etched by taking the first side wall as a mask subsequently, and the problem that the width of the remaining control gate layer is shortened due to erosion of the first side wall, therefore, the coupling capacitance between the control gate layer and the floating gate layer is relatively low can be avoided, and the overall performance of the semiconductor device is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the improvement of people's living standards, electronic products are more and more widely used, and various semiconductor products are usually used in electronic products. With the development of science and technology and the increase of people's demand, people's requirements for the performance of semiconductor products are also getting higher and higher. [0003] For example, for a semiconductor device with a memory cell, whether the coupling capacitance between its control gate and floating gate is sufficient is an important criterion for testing the performance of the semiconductor device, and the semiconductor device prepared based on the current semiconductor production process is due to The short width of the control gate results in relatively low coupling capacitance be...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L21/3213H01L29/788
CPCH01L29/66825H01L21/32139H01L29/788
Inventor 周海洋刘长振
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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