Optical proximity correction method and device

Abstract

The embodiment of the invention discloses an optical proximity correction method and device. The optical proximity correction method comprises the following steps: manufacturing a test mask; obtaining wafer data under the current photoetching condition by using the test mask; establishing an optical proximity correction model and a process variation bandwidth model by using wafer data; correcting the target graph according to the optical proximity correction model and the process variation bandwidth model to respectively obtain a first corrected graph and a second corrected graph; calculating a difference value between a first simulation contour of the first correction graph and a second simulation contour of the second correction graph; and adjusting the correction mode of the target graph according to the size of the difference value. According to the technical scheme provided by the embodiment of the invention, variation possibly caused by the process variation bandwidth is considered during correction, a photoetching process window is enlarged, and the yield of products is improved.

Description

technical field [0001] Embodiments of the present invention relate to semiconductor manufacturing technology, and in particular to an optical proximity correction method and device. Background technique [0002] Due to the diffraction effect of ultraviolet light, the image pattern exposed on the photoresist on the surface of the silicon wafer is distorted, and the image quality is finally reduced. This is called the optical proximity effect (Optical Proximity Effect, OPE). The image distortion caused by OPE is mainly The performance is that the line width is shifted, the lines are shortened, and the corners are rounded. [0003] By making appropriate modifications to the pattern on the mask to compensate for this effect, the same pattern as the design can be obtained on the silicon wafer. This correction is called Optical Proximity Correction (OPC). The existing OPC is mainly to ensure that the critical dimensions of the silicon wafer are close to the design target and mini...

AI Technical Summary

Problems solved by technology

The existing OPC is mainly to ensure that the critical dimensions of the silicon wafer are close to the design target and minimize the edge placement error (Edge PlacementError, EPE), but at this time it may not be possible to ensure that the size of the photolithography process window (Process window, PW) conforms to the process The scope of the above requirements, resulting in the quality of the process cannot be guaranteed

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