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Preparation method of nonvolatile memory

A non-volatile memory technology, applied in the field of non-volatile memory preparation, can solve the problem of weak control ability of current tunneling channel, achieve the effect of increasing acquisition ability, increasing width, and reducing leakage

Pending Publication Date: 2021-10-19
NEXCHIP SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The purpose of the present invention is to provide a method for preparing a non-volatile memory, which solves the problem of weak control ability of the gate to the current tunneling channel in the existing non-volatile memory

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  • Preparation method of nonvolatile memory
  • Preparation method of nonvolatile memory
  • Preparation method of nonvolatile memory

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Embodiment Construction

[0043] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0044] see figure 1 and Figure 18 , the nonvolatile memory of the present invention may include a plurality of storage units. In one embodiment, the nonvolatile memory structure may include a plurality of storage units, and each storage unit includes a substrate 100, a source 200, a drain 300 and a gate 400 structure, wherein the substrate 100 may include but not limited to single crystal or polycrystalline semiconductor material, and the substrate ...

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Abstract

The invention discloses a preparation method of a nonvolatile memory, which belongs to the technical field of integrated circuits. The preparation method at least comprises the following steps of providing a substrate, forming at least two isolation structures in the substrate, wherein the top surface of each isolation structure is higher than the surface of the substrate, forming a concave part between the side wall of the isolation structure and the side wall of the adjacent substrate by adopting isotropic etching, forming a tunneling oxide layer on the surface of the substrate and the side wall of the substrate, and forming a gate layer on the tunneling oxide layer, wherein the gate layer covers the tunneling oxide layer and the concave part. A plurality of current tunneling channel control surfaces are formed between the formed gate and the substrate, so that the control capability of the gate on the current tunneling channel is effectively improved, the electric leakage is reduced, and the saturation current of the nonvolatile memory is improved.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a preparation method of a nonvolatile memory. Background technique [0002] A non-volatile memory (Non-Volatile Memory, NVM) is any form of solid-state memory, which does not need to periodically refresh the data stored in the memory. Non-volatile memory includes all forms of read-only memory (ROM), such as programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable read-only memory (EEPROM), and flash memory ( Flash), including battery-backed random access memory (RAM). As the feature size of devices shrinks and the level of integration continues to increase, traditional charge-storage-based non-volatile memories will face physical and technological limits. With the continuous shrinking of the process size of non-volatile memory, the influence of short channel effect SCE (short channel effect) is intensifi...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11517H01L27/11521H10B41/00H10B41/30
CPCH10B41/00H10B41/30
Inventor 张傲峰李建财
Owner NEXCHIP SEMICON CO LTD