Method of forming vanadium nitride-containing layer and structure comprising the same

Abstract

The current disclosure relates to methods of forming a vanadium nitride-containing layer. The method comprises providing a substrate within a reaction chamber of a reactor and depositing a vanadium nitride-containing layer onto a surface of the substrate, wherein the deposition process comprises providing a vanadium precursor to the reaction chamber and providing a nitrogen precursor to the reaction chamber. The disclosure further relates to structures and devices comprising the vanadium nitride-containing layer.

Description

technical field [0001] The present disclosure generally relates to methods and systems suitable for producing thin films. More particularly, the present disclosure relates to methods and systems for producing vanadium nitride-containing layers by deposition processes and structures comprising the same. Background technique [0002] The miniaturization of semiconductor devices such as, for example, complementary metal-oxide-semiconductor (CMOS) devices has brought about significant improvements in integrated circuit speed and density. However, conventional device miniaturization techniques face significant challenges for future technology nodes. [0003] For example, one challenge is finding suitable conductive materials for use as gate electrodes in CMOS devices. CMOS devices conventionally use n-type doped polysilicon as the gate electrode material. However, doped polysilicon may not be an ideal gate electrode material for advanced node applications. Although doped poly...

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Problems solved by technology

However, as device geometries decrease in advanced node applications, the threshold voltage adjustment implant process may become increasingly complex and impractical

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