System-in-package device and method

Abstract

The invention discloses a system-in-package device and method. The device comprises: a first substrate comprising a first bearing surface and a first non-bearing surface, wherein the first bearing surface and the first non-bearing surface are arranged in a back-to-back manner; at least one first functional device fixed on the first bearing surface and electrically connected with the first substrate; a second substrate electrically connected with the first substrate and comprising a second bearing surface and a second non-bearing surface, wherein the second bearing surface and the second non-bearing surface are oppositely arranged, the second non-bearing surface is opposite to the first bearing surface and is fixedly arranged, the second substrate is provided with a groove penetrating through the second bearing surface and the second non-bearing surface, and the at least one first functional device is exposed from the groove; and a second functional device arranged above the at least one first functional device in a bridging manner, fixedly arranged with the second bearing surface around the at least one first functional device, and electrically connected with the second substrate. In this way, the yield of the system-in-package device can be effectively improved.

Description

technical field [0001] The present application relates to the technical field of semiconductor packaging, in particular to a system-in-package device and method. Background technique [0002] As the development of Moore's Law is approaching the limit, the integration of integrated circuits is getting higher and higher, and electronic products are developing in the direction of miniaturization, intelligence and high performance. Among them, system-in-package technology is currently the mainstream technology that can realize system miniaturization. Different chips can be packaged side by side or stacked, and multiple active electronic devices or optional passive devices with different functions can be assembled together. In order to achieve a specific function. [0003] The structural design of system-in-package devices in the prior art is usually stacked horizontally or vertically on a single substrate. In order to further compress the packaging size, embedded packaging tec...

AI Technical Summary

Problems solved by technology

[0004] However, embedded packaging technology usually covers a layer of metal layer on both sides of the chip, and then forms a metal groove by electroplating on the metal layer. During the production process, the metal layer is easily separated from the chip due to external force impact. resulting in abnormal product quality

Embedded packaging technology has extremely high requirements on process precision, and currently there are few substrate manufacturers that can undertake it, and most of them can only embed smaller devices such as capacitors and resistors.

Images