Chip and electronic equipment
A chip and daozi technology, applied in the field of chips and electronic equipment, can solve the problems of complex chip structure, signal crosstalk, increase chip manufacturing cost, etc., and achieve the effect of increasing chip area, reducing manufacturing cost, and reducing crosstalk.
Pending Publication Date: 2022-05-31
GUANGDONG OPPO MOBILE TELECOMM CORP LTD
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Problems solved by technology
[0002] At present, the chip design method of system-on-chip (SoC) chips or media processing chips is channel (channel) design. Chips designed by channel have complex chip structures, the number of integrated IPs, and many types of IPs. The definition of the clock is relatively complicated, and the definition of the product is relatively complicated. Therefore, the design of the chip designed by the channel is very difficult, and it is usually realized by reserving a channel on the chip and routing wires in the channel.
[0003] However, a large number of signal lines run in parallel in the narrow channel, and the mutual capacitance and mutual inductance between adjacent signal lines make the signal partly couple the voltage, current and other signals carried by itself to the adjacent signal lines during the transmission process, which is easy crosstalk between signals
[0004] At present, crosstalk between signals can be reduced by expanding the distance between signal lines or adding protective ground wires between adjacent signal lines. However, the above methods will increase the channel area of the chip, thereby increasing the manufacturing cost of the chip.
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[0037] It should be understood that the specific embodiments described here are only used to explain the present application. It is not intended to limit the application.
[0038] According to different product features, the chip can include two implementation methods: channel and channelless (no channel). Among them, the chip structure and clock structure of the channelless chip are relatively simple, and there are a large number of repetitive instantiated IPs, such as figure 1 As shown, the channelless chip is provided with a large number of repetitive digital signal processing (Digital Signal Process, DSP) modules, and also provided with double-rate synchronous dynamic random access memory (Double Data Rate, DDR) modules, logic (logic device) modules, CPU Modules and SERDES modules. These modules are closely connected in channelless chips. Such chips are usually relatively large in scale. Using channelless chips can greatly save chip area, such as digital communication chi...
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The embodiment of the invention provides a chip and electronic equipment. The chip comprises a plurality of wiring layers arranged in a channel region; each wiring layer in the multiple wiring layers is wired in one direction; wherein the first wiring layer in the multiple wiring layers is provided with a group of signal lines along the channel direction of the channel region; a second wiring layer adjacent to the first wiring layer is disposed as a protective ground plane.
Description
technical field [0001] The present application relates to the field of chips, in particular to a chip and electronic equipment. Background technique [0002] At present, the chip design method of system-on-chip (SoC) chips or media processing chips is channel (channel) design. Chips designed by channel have complex chip structures, the number of integrated IPs, and many types of IPs. The definition of the clock is relatively complicated, and the definition of the product is relatively complicated. Therefore, the design of the chip designed by the channel is very difficult, and it is usually realized by reserving a channel on the chip and routing wires in the channel. [0003] However, a large number of signal lines run in parallel in the narrow channel, and the mutual capacitance and mutual inductance between adjacent signal lines make the signal partly couple the voltage, current and other signals carried by itself to the adjacent signal lines during the transmission proces...
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Login to View More IPC IPC(8): H01L23/528
CPCH01L23/528H01L23/5286H01L23/5283
Inventor 刘君
Owner GUANGDONG OPPO MOBILE TELECOMM CORP LTD