Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof. The forming method comprises the following steps: providing a substrate, a gate structure, a source-drain doped region and an interlayer dielectric layer; removing the gate structure in the isolation region, forming an isolation opening, and exposing the top and the side wall of the fin part in the isolation region; doping the fin part below the isolation opening to form an isolation doped region, wherein the doping type of the isolation doped region is different from that of the source-drain doped region; and after doping, the isolation openings are filled with isolation structures, and the isolation structures stretch across the fin parts of the isolation regions. According to the embodiment of the invention, the isolation doped region is formed, so that the doping concentration of inversion ions in the fin part of the isolation region can be improved, the potential barrier of a PN junction formed by the source-drain doped region and the fin part of the isolation region is correspondingly improved, conduction current is prevented from being generated in the fin part of the isolation region when the device works, and further isolation between the fin part of the isolation region and fin parts of other regions is realized; and a fin cutting process is not needed, so that the fin part is of a continuous structure, and stress release in the fin part can be prevented.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] In semiconductor manufacturing, with the development trend of VLSI, the feature size of integrated circuits continues to decrease. In order to adapt to smaller feature sizes, Metal-Oxide-Semiconductor Field-Effect Transistor , MOSFET) channel length is correspondingly shortened. However, with the shortening of the channel length of the device, the distance between the source electrode and the drain electrode of the device is also shortened, so the control ability of the gate structure to the channel becomes worse, and the gate voltage pinch off the channel. The difficulty of the channel is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE: short-channel effects), more likely to...

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Problems solved by technology

[0004] However, the performance of current FinFETs still needs to be improved

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