Method and system for evaluating service life of integrated circuit chip based on machine learning

Abstract

The invention discloses an integrated circuit chip life evaluation method and system based on machine learning. The method comprises the following steps: recording a real data set of an integrated circuit chip according to a life test and establishing a life distribution function; obtaining a corresponding simulation life value by using the life distribution function to obtain a simulation data set; combining the real data set and the simulation data set to form an original data set for training and optimizing the machine learning regression model; for the parametric data in the original data set, obtaining a parametric feature vector through feature extraction; converting the two-dimensional structure connection diagram into a feature vector to form a structure feature vector of the chip; combining the parametric feature vectors and the structural feature vectors to form a full feature vector set, and inputting the full feature vector set into a machine learning regression model for model fusion to obtain a fusion regression model; and finally forming an end-to-end chip life prediction model by using the training set and the test set. The method can accurately predict and evaluate the service life of the integrated circuit chip in real time.

Description

technical field [0001] The invention relates to an integrated circuit chip life evaluation method and system, and belongs to the technical field of semiconductor failure analysis. Background technique [0002] Electronic equipment is more and more widely used in the military and aerospace fields, and its reliability requirements are also increasing. With the improvement of the design technology and manufacturing level of integrated circuits, the integration of large-scale electronic equipment has become higher and higher, and the functions have become more and more complex. With the rapid development of electronic chip technology, the feature size of CMOS device technology is becoming more and more miniaturized and integrated. The failure of interconnect structure and thermal stress have become the most challenging problems in the design of nano-integrated circuits. The increase in integration density and power consumption leads to higher die temperature, die temperature gr...

AI Technical Summary

Problems solved by technology

[0007] The technical problem to be solved by the present invention is: in order to overcome the problems of large monitoring data errors, unreasonable average life reliability and insufficient applicability of accelerated models in traditional accelerated life tests or accelerated degradation tests when evaluating packaging and interconnection structures, the present invention The invention proposes a chip life evaluation method and system based on multi-material stacked chip structure modeling machine learning technology, which can more accurately and targetedly evaluate the life of integrated circuit chips

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