Method and system for evaluating service life of integrated circuit chip based on machine learning

An integrated circuit and machine learning technology, applied in the field of semiconductor failure analysis, can solve the problems of large monitoring data error, insufficient applicability of accelerated models, unreasonable average life reliability, etc., to improve efficiency, improve prediction accuracy, and increase model Effects of Accuracy and Robustness

Pending Publication Date: 2022-07-01
BEIJING MXTRONICS CORP +1
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  • Abstract
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Problems solved by technology

[0007] The technical problem to be solved by the present invention is: in order to overcome the problems of large monitoring data errors, unreasonable average life reliability and insufficient applicability of accelerated models in traditional accelerated life tests or accelerated degradation tests when eva

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  • Method and system for evaluating service life of integrated circuit chip based on machine learning
  • Method and system for evaluating service life of integrated circuit chip based on machine learning
  • Method and system for evaluating service life of integrated circuit chip based on machine learning

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Embodiment Construction

[0045] Embodiments will be described in detail below with reference to the accompanying drawings.

[0046] like Figure 4 As shown, a method for evaluating the life of an integrated circuit chip based on machine learning includes the following steps:

[0047] 1. Data collection

[0048] The data source consists of two parts: the real data set recorded by the life test, and the simulation data generated by establishing the life distribution function based on the real data;

[0049] The simulation life value uses the life distribution function to randomly generate n groups (for example, n=5000) in the fluctuation range of the relevant parameters, and each group of data contains the relevant parameter data of the chip and is represented as c i , the corresponding chip life is recorded as y i , denoting the simulation dataset as {c i , y i }, i=1,...,n. At the same time, the experimental real data set is represented in the same way, and the real and simulated data sets are c...

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Abstract

The invention discloses an integrated circuit chip life evaluation method and system based on machine learning. The method comprises the following steps: recording a real data set of an integrated circuit chip according to a life test and establishing a life distribution function; obtaining a corresponding simulation life value by using the life distribution function to obtain a simulation data set; combining the real data set and the simulation data set to form an original data set for training and optimizing the machine learning regression model; for the parametric data in the original data set, obtaining a parametric feature vector through feature extraction; converting the two-dimensional structure connection diagram into a feature vector to form a structure feature vector of the chip; combining the parametric feature vectors and the structural feature vectors to form a full feature vector set, and inputting the full feature vector set into a machine learning regression model for model fusion to obtain a fusion regression model; and finally forming an end-to-end chip life prediction model by using the training set and the test set. The method can accurately predict and evaluate the service life of the integrated circuit chip in real time.

Description

technical field [0001] The invention relates to an integrated circuit chip life evaluation method and system, and belongs to the technical field of semiconductor failure analysis. Background technique [0002] Electronic equipment is more and more widely used in the military and aerospace fields, and its reliability requirements are also increasing. With the improvement of the design technology and manufacturing level of integrated circuits, the integration of large-scale electronic equipment has become higher and higher, and the functions have become more and more complex. With the rapid development of electronic chip technology, the feature size of CMOS device technology is becoming more and more miniaturized and integrated. The failure of interconnect structure and thermal stress have become the most challenging problems in the design of nano-integrated circuits. The increase in integration density and power consumption leads to higher die temperature, die temperature gr...

Claims

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Application Information

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IPC IPC(8): G06F30/27G06F119/04
CPCG06F30/27G06F2119/04
Inventor 田梦珂王勇林鹏荣谢晓辰黄颖卓姜学明王胜杰郭亨通
Owner BEIJING MXTRONICS CORP
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