Unlock instant, AI-driven research and patent intelligence for your innovation.

Hybrid carrier control device

A technology for controlling devices and carriers, which is applied to semiconductor devices, electrical components, circuits, etc., can solve the problems of poor trade-off relationship of thyristor conduction voltage drop, poor practicability, weak anti-electromagnetic interference ability, etc., and achieve anti-electromagnetic interference ability Strong, performance-enhancing, conflict-solving effects

Active Publication Date: 2022-07-05
强华时代(成都)科技有限公司
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Aiming at the above-mentioned deficiencies in the prior art, a hybrid carrier control device provided by the present invention solves the problems of poor trade-off relationship between turn-on voltage drop and turn-off loss of existing thyristors, weak anti-electromagnetic interference ability, and poor practicability

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Hybrid carrier control device
  • Hybrid carrier control device
  • Hybrid carrier control device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0044] The present invention provides a hybrid carrier control device, which includes a main working unit and at least one depletion-mode PMOS structure; the main working unit includes a gate-controlled region and a thyristor region, the gate-controlled region, the depletion-mode PMOS structure The regions and the thyristor regions are arranged from top to bottom, and the depletion-mode PMOS structures are arranged in parallel in an adjacent form.

[0045] In this embodiment, the gate control region includes a first electrode 111, a first insulating material 201, a second electrode 121, a second insulating material 211, a fourth electrode 141, a fourth electrode heavily doped ohmic contact region 301, and a fourth electrode Four-electrode base region 401;

[0046] The first electrode 111 is disposed in the first insulating material 201 , the second electrode 121 is disposed in the second insulating material 211 , and the fourth electrode base region 401 is disposed in the four...

Embodiment 2

[0060] like figure 2 As shown, the present invention provides a hybrid carrier control device, including a main working unit and two depletion-mode PMOS structures; the main working unit includes a gate control region and a thyristor region, the gate control region, the consumption The depletion PMOS region and the thyristor region are arranged from top to bottom, and the two depletion PMOS structures are arranged in parallel in an adjacent form.

[0061] In this embodiment, the gate control region includes a first electrode 111, a first insulating material 201, a second electrode 121, a second insulating material 211, a fourth electrode 141, a fourth electrode heavily doped ohmic contact region 301, and a fourth electrode The base region 401; the first electrode 111 is arranged in the first insulating material 201; the second electrode 121 is arranged in the second insulating material 211; the fourth electrode 141 is arranged between the first insulating material 201 and the...

Embodiment 3

[0075] like Figure 7 As shown, the present invention provides a hybrid carrier control device, which includes a main working unit and three depletion-mode PMOS structures; the main working unit and the depletion-mode PMOS structure are respectively arranged in the MOS gated thyristor Both ends; the main working unit includes a gated region and a thyristor region, the gated region, the depletion-mode PMOS region and the thyristor region are arranged from top to bottom, and the depletion-mode PMOS structures are juxtaposed in an adjacent form set up.

[0076] In this embodiment, the gate control region includes a first electrode 111, a first insulating material 201, a second electrode 121, a second insulating material 211, a fourth electrode 141, a fourth electrode heavily doped ohmic contact region 301, and a fourth electrode Four-electrode base region 401; the first electrode 111 is disposed in the first insulating material 201, the second electrode 121 is disposed in the se...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
lengthaaaaaaaaaa
thicknessaaaaaaaaaa
Login to View More

Abstract

The invention provides a hybrid carrier control device, and belongs to the technical field of power semiconductors. Comprising a main working unit and at least one depletion type PMOS structure; the main working unit and the depletion type PMOS structure are respectively arranged at two ends of the MOS grid control thyristor; the main working unit comprises a grid control region and a thyristor region, the grid control region, the depletion type PMOS region and the thyristor region are arranged from top to bottom, and all the depletion type PMOS structures are arranged side by side in an adjacent mode. According to the invention, the problems of poor trade-off relationship between the conduction voltage drop and the turn-off loss, weak anti-electromagnetic interference capability and poor practicability of the existing grid-control thyristor are solved.

Description

technical field [0001] The invention belongs to the technical field of power semiconductors, and in particular relates to a hybrid carrier control device. Background technique [0002] The conventional MCT is a composite device formed by simply combining the MOSFET structure and the thyristor structure. Because the resistance of the MOS gate insulating layer is very high, the input power of the device is very small, the gate driving circuit is simple, and the switching speed is fast. The thyristor device has extremely low on-voltage drop and strong high current load capacity. Therefore, the MCT device combining the MOS transistor and the thyristor can effectively improve the controllability problem of the conventional thyristor, and the current load capacity is increased. But such a simple combination makes the loss when the device is turned off very large. In order to reduce the turn-off loss and improve the device performance, anode-shorted MCT (AS-MCT) and cathode-shor...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/745H01L29/749H01L29/06
CPCH01L29/7455H01L29/749H01L29/0615H01L29/0619
Inventor 汪志刚李雪黄孝兵
Owner 强华时代(成都)科技有限公司