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Reference clock abnormity self-checking circuit and method

A technology of reference clock and self-checking circuit, applied in multiple input and output pulse circuits, electrical components, detecting faulty computer hardware, etc., can solve the problem of long logic judgment time, sub-system inoperable, and too late to give switching signal and other problems to achieve the effect of increasing reliability

Active Publication Date: 2022-07-15
NANJING SEMIDRIVE TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Sometimes the external system of the SOC also has a backup clock, such as the 32k RTC clock that is always on, but the clock that is too slow gives a logical judgment for too long, and it is too late to give a switching signal, and the subsystem has long been unable to work
The second is the unexpected frequency deviation of the reference clock, which exceeds the normal working range required by the sub-module. If the status of the reference clock can be monitored in real time and the frequency deviation range is given, the frequency correction of the reference clock and the fast and smooth switching inside the sub-module will be possible. very practical significance
[0003] The traditional clock anomaly detection method relies on external additional reference clocks and counters, and the frequency deviation range of the detected clock is inaccurate and has poor reliability.

Method used

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  • Reference clock abnormity self-checking circuit and method
  • Reference clock abnormity self-checking circuit and method
  • Reference clock abnormity self-checking circuit and method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0040] figure 1 It is a schematic block diagram of the reference clock abnormality self-checking circuit according to the present application, such as figure 1 As shown, the reference clock abnormality self-checking circuit of the present application includes a clock receiving and shaping module 10 , a frequency dividing module 20 , a clock cycle sampling module 30 , a comparator 40 , and a logic latch output module 50 .

[0041] The clock receiving and shaping module 10 , which performs denoising and shaping processing on the received reference clock signal and sends it to the frequency dividing module 20 .

[0042] In the embodiment of the present application, the clock receiving and shaping module 10 uses a Schmitt trigger with hysteresis to perform denoising and shaping processing on the reference clock signal.

[0043] The frequency dividing module 20 divides the frequency of the reference clock signal after denoising and shaping to obtain a reference clock cycle signal ...

Embodiment 2

[0073] image 3 For the flow chart of the reference clock anomaly detection method according to the present application, the following will refer to image 3 , the reference clock anomaly detection method of the present application is described in detail.

[0074] First, in step 101, the received reference clock signal is denoised and shaped.

[0075] In the embodiment of the present application, the clock receiving and shaping module 10 with a Schmitt trigger with hysteresis is used to de-noise and shape the reference clock signal.

[0076] In step 102, the frequency of the shaped reference clock signal is divided to obtain a reference clock period signal.

[0077] In the embodiment of the present application, the frequency dividing module 20 is used to divide the frequency of the reference clock signal to obtain a pair of reference clock cycle signals whose dutycycle is 50%.

[0078] In step 103, the frequency-divided reference clock period signal is sampled and held, and...

Embodiment 3

[0088] The present application also provides a micro-control chip, including the above-mentioned abnormal self-checking circuit of the reference clock.

[0089] In the embodiments of this application, micro-control chips include but are not limited to processors for consumer electronic products, processors for industrial products such as smart home, automation, medical applications, and new energy generation and distribution, and automotive-grade MCU chips for automotive electronics Wait.

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Abstract

A reference clock abnormity self-checking circuit comprises a clock receiving and shaping module used for denoising and shaping a received reference clock signal; the frequency division module is used for performing frequency division on the denoised and shaped reference clock signal to obtain a reference clock periodic signal; the clock period sampling module is used for converting the reference clock period signal into continuous sampling voltage; the comparator is used for converting the sampling voltage into a logic signal; and the logic latch output module is used for generating a clock state indication signal according to the logic signal and outputting the clock state indication signal. The invention further provides a reference clock abnormity self-checking method, external control of the SOC system is not needed, rapid internal self-checking is carried out on the reference clock, the frequency offset range of the clock can be accurately detected, the chip area is effectively saved, the detection reliability is improved, and the function safety requirement is met.

Description

technical field [0001] The present application relates to the field of integrated circuits, and in particular, to a reference clock abnormality self-checking circuit and method. Background technique [0002] In the automotive-grade MCU chip, the clock determines the reliability of the circuit function. Inside the sub-module, in addition to the accurate reference clock provided externally, there will also be a backup RC clock inside. When the external reference clock is unexpectedly slowed down or lost unexpectedly When it is required, the internal fast self-test is required to smoothly switch to the standby clock, otherwise the circuit will not work properly. Therefore, a special clock abnormal self-test circuit is used to detect the state of the clock. There are two main aspects of clock anomaly detection: First, the reference clock is lost unexpectedly, which requires the system to respond quickly. Sometimes the SOC external system also has a backup clock, such as the no...

Claims

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Application Information

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IPC IPC(8): G06F11/22H03K5/01H03K5/156H03K5/24H03K21/08
CPCG06F11/2236G06F11/2273H03K5/01H03K5/1565H03K5/24H03K21/08Y02D10/00
Inventor 何芳
Owner NANJING SEMIDRIVE TECH CO LTD
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