Multi-order memory unit

Abstract

The invention provides a multi-level memory unit, which includes a substrate, a first floating gate, a second floating gate and a control gate. The substrate has a first doped region, a second doped region and a channel region located between the first doped region and the second doped region. The first floating gate is insulated on the channel region next to the first doped region. The second floating gate is insulated on the channel region next to the second doped region, and is separated from the first floating gate. The control gate is insulated on the first and second floating gates. When this kind of memory cell writes different bits, the bias voltage value of the control gate is the same, and the first doped region or the second doped region is biased with a fixed voltage value depending on the bit to be stored. In addition, when writing The same bias value is used on the control gate when entering and erasing, so the storage capacity per unit chip area is increased, and the purpose of simplifying the peripheral circuit is also achieved.

Description

technical field [0001] The present invention relates to a semiconductor storage device, in particular to a multi-level storage unit, which can store multiple bits and increase the bit storage capacity per unit chip area without complex peripheral circuits. Background technique [0002] As CMOS technology penetrates below the sub-micron level, the density of flash memory is also increasing, which greatly reduces the cost per bit. However, more problems will be encountered in the process of reducing the size of the circuit. Some researchers have proposed multi-level structures of different types of memory, including DRAM, SDRAM, and Flash EEPROM. Among them, the multi-level Flash EPROM is particularly noticed. Before the concept of the multi-level structure was applied to the flash memory, a flash memory cell could only store one bit, and the reading of the bit was controlled by changing the threshold voltage. The change in the threshold voltage is caused by the change in t...

AI Technical Summary

Problems solved by technology

[0005] For traditional multi-level flash memory, because it requires different voltage values ​​for writing, the peripheral circuits required are quite complicated.

And its reliability issues are also different from those of single-unit memory

On the other hand, although the multi-storage flash memory, the reliability and the circuit complexity are similar to the memory of the unit cell, there is a problem that the size of the memory cell is too large

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