Unlock instant, AI-driven research and patent intelligence for your innovation.

Method for removing photoresistive layer in mfg. process of inserting metals

A process and photoresist layer technology, applied in the field of photoresist layer removal, to achieve the effect of improving yield and productivity

Inactive Publication Date: 2005-10-05
UNITED MICROELECTRONICS CORP
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Especially in the copper / chemical vapor deposition type inorganic low-k damascene structure, the above-mentioned problems will be more serious

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for removing photoresistive layer in mfg. process of inserting metals
  • Method for removing photoresistive layer in mfg. process of inserting metals
  • Method for removing photoresistive layer in mfg. process of inserting metals

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0014] The direction of the invention discussed here is a trench etch process with a high aspect ratio. In order to provide a thorough understanding of the present invention, detailed steps or elements are set forth in the following description. Obviously, the practice of the invention is not limited to specific details familiar to those skilled in the art of semiconductor devices. In other instances, well-known process steps or elements have not been described in detail in order not to unnecessarily limit the present invention. Preferred embodiments of the present invention are described in detail as follows, but in addition to these detailed descriptions, the present invention can also be widely implemented in other embodiments, and the scope of the present invention is not limited, but defined by the claims The scope of patent protection shall prevail.

[0015] refer to Figure 2A to Figure 2D As shown, in the first embodiment of the present invention, a semiconductor su...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

First, the semiconductor component is provided with the inter-metal dielectric layer being covered. Then, the limited photoresistive layer is formed above the dielectric layer. Next, with the photoresistive layer being as the mask, the etching procedure is carried out, eating thrown the dielectric layer forming holes. Meanwhile, the polymer layer is formed on the surface of the photoresistive layer. Finally, two steps of the removing procedure are carried out in order to remove the polymer layer and the photoresistive layer. Based on the said procedure, the groove outline can be maintained and the residue of the polymer layer can be avoided.

Description

(1) Technical field [0001] The present invention relates to a manufacturing process of a dual damascene (Dual Damascene) semiconductor device, and in particular to a method for removing a photoresist layer in a damascene process. (2) Background technology [0002] Due to the increasing integration of semiconductor elements of integrated circuits, when the surface of the wafer cannot provide enough area to make the required interconnection, in order to cooperate with the increase in the internal connection after the metal oxide semiconductor (Metal OxideSemiconductor; MOS) transistor shrinks In order to meet the wiring requirements, the design of more than two metal layers has gradually become a necessary method for many integrated circuits. In addition, in the deep sub-micron process, due to the increasing integration of integrated circuits, most of the three-dimensional structures of multi-level interconnects (Multi-level interconnects) are currently used, and often inter-m...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G03F7/42H01L21/311H01L21/768
CPCG03F7/427H01L21/76807H01L21/31138
Inventor 吴至宁
Owner UNITED MICROELECTRONICS CORP