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Reliability testing device and its testing method

A technology of testing equipment and testing methods, which is applied in the direction of semiconductor/solid-state device testing/measurement, electronic circuit testing, etc., can solve the problems of experimental errors, increase the crystal area, and inapplicability, and achieve low cost and high measurement efficiency. Effect

Inactive Publication Date: 2005-11-09
WINBOND ELECTRONICS CORP
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Problems solved by technology

However, this bias and temperature stress test method is only suitable for thin oxide layers, and the flat band voltage change of thick oxide layers is not obvious, so it cannot be applied to measure the concentration of mobile ions in thick oxide layers.
[0005] Furthermore, there is a measurement method called triangular voltage sweep (TVS), which uses the displacement current (displacement current) caused by the ionization of mobile ions to different positions to detect PMIC, because the signal is quite weak , so it is necessary to increase the crystal area, but the junction capacitance (junction capacitance) will cause a huge experimental error
In addition, U.S. Patent No. 5,751,015 discloses a PMIC that detects changes in mobility (mobility), but requires an external heating source and can only measure thin oxide layers.

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  • Reliability testing device and its testing method
  • Reliability testing device and its testing method
  • Reliability testing device and its testing method

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Embodiment Construction

[0019] Please refer to Fig. 1, which shows a top view of the reliability test device according to the present invention, a preferred embodiment of the layout on a semiconductor substrate;

[0020] As shown in FIG. 2 , an N-type well region 11 is formed at a predetermined position of the semiconductor substrate 10 , and an insulating structure 12 is provided on the surface of the substrate 10 to define an active region within the N-type well region 11 . The insulating structure 12 can be, for example, a field oxide formed by a local oxidation method (LOCOS). A PMOS transistor 1 is formed in the active region, including mutually separated P-type doped regions 15, a gate dielectric layer 13, and a gate electrode layer 14; wherein the gate dielectric layer 13 is located at the P On the N-type well region 11 between the N-type doped regions 15 , the gate electrode layer 14 is located on the gate dielectric layer 13 . In addition, the polysilicon layer 16 covers the surface of the ...

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Abstract

The invention relates to a device and method for testing the reliability. The device is set on a semiconductor substrate and includes the insulation structure, one MOS transistor, a crystal siolicon layer, an insulatino layer and a metal layer. The insulation structure is positioned on the semicondcutor substrate, defining an active region. The MOS transistor is positioned on the semiconductor substrate within the active region. The polysilicon layer is positioned above the insulatino structure. When a current passes through the polysilicon layer, temperature of the semiconductor substrate is increased caused by the numerical value of resistance of the polysilicon layer. The insulation layer covers the surface of the semiconductor substrate. The metal layer is positioned above the insulation layer and located upside of the MOS transistor.

Description

technical field [0001] The present invention relates to the testing technology of semiconductor integrated circuits, in particular to a reliability testing device and testing method suitable for semiconductor integrated circuits. Background technique [0002] In a semiconductor integrated circuit with a MOS structure, the existence of mobile ions will cause the threshold voltage (threshold voltage) of the MOS device to shift, especially when the temperature of the device rises, the problem of the threshold voltage shift will become more serious. Known phenomenon of critical voltage shift, possibly due to phenomena such as Na + or K + Because mobile ions with positive charges exist in the oxide layer, it is also called positive mobile ionic contamination (hereinafter referred to as PMIC) phenomenon. [0003] When the size of components shrinks day by day, it is inevitable to adopt multi-layer metal structures to meet the demands of a large number of interconnections. Howev...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/28H01L21/66
Inventor 陈伟梵
Owner WINBOND ELECTRONICS CORP
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