External power supply ring with multiple slender tapes for decreasing voltage drop of integrated circuit
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- VIA TECH INC
- Publication Date
- 2002-10-09
- Estimated Expiration
- Not applicable · inactive patent
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Abstract
Description
technical field
[0001] The present invention relates to the field of very large scale integrated circuits, and more particularly to a way of providing the power bus of an integrated circuit while reducing the voltage drop in the core of the integrated circuit. Background technique
[0002] In the Integrated Circuit (IC) industry, Complementary Metal Oxide Semiconductor (CMOS) technology has played an increasingly important role. Over the years, improved CMOS technology has apparently remained the main center stage technology for Very Large Scale Integration (VLSI). CMOS VLSI technology can produce a large number of transistors and input / output (Input / Output, I / O for short) interfaces on an IC (sometimes called a chip) with extremely high operating speed. The improved CMOS VLSI technology with reduced and reduced device size is particularly suitable for production and manufacturing techniques.
[0003] There are many ways to improve the manufacturing process of CMOS, mainly...