Method for forming self-alignment metal silicide

Abstract

This invention provides a method for forming a self-aligning metal silicide which forms an isolation zone, transistor grating structure and a light doped source / drain zone on a semiconductor base, and a grating gap wall on the grating side wall containing a silicon oxide layer and a silicon nitride layer on it then a heavy doped source / drain zone, and to form a blocking layer on the metal layer before forming metal silicide by heat annealing in the successive process of self-aligning metal silicide, utilizing the silicon nitride layer of the said grating gap wall and the said blocking layer to stop Si atoms and O actoms from diffusing to the side wall of the grating gap wall to avoid short circuit.

Description

technical field [0001] The present invention relates to a method for forming a self-aligned silicide (Self-aligned Silicide, SALICIDE), in particular to a method for forming a self-aligned silicide that can avoid short circuits caused by gate spacers method. Background technique [0002] When the production of semiconductor components enters the deep sub-micron process, and the integration of integrated circuits is getting higher and higher, the size of the components is getting smaller and smaller, so that the area of ​​the gate and source / drain regions is also reduced, and in order to reduce The serial resistance of components, the reduction of the number of metal contact windows, and the convenience of subsequent connection wire layout (Layout) are increased, thereby reducing the entire component arrangement area. The use of automatic alignment metal silicide technology has gradually been widely used in semiconductor manufacturing processes. [0003] In the deep sub-micr...

AI Technical Summary

Problems solved by technology

However, in the above-mentioned conventional process, the silicon atoms in the gate structure or the source / drain region will diffuse to the gate spacer to form titanium silicide (TiSi 2 ) metal silicide, or oxygen atoms diffuse through the titanium metal layer to the sidewall of the gate spacer due to high temperature to form conductive titanium oxide, or the temperature of the self-aligned metal silicide reaction (salicidation) is improper. Various other reasons for the reaction of silicon dioxide to produce titanium silicide, etc.; due to these factors, conductive impurities will be formed on the sidewalls of the gate spacer between the gate structure and the source / drain region, and this conductive Impurities cannot be removed with selective chemical solutions, thus causing bridging between the gate structure and the source / drain region, resulting in device failure

[0005] Therefore, the present invention proposes a better self-aligned metal silicide formation step in order to solve the short circuit phenomenon caused on the gate spacer in order to solve the above-mentioned conventional defects.

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