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Capacity mismatch calibrating device

A capacitance mismatch and calibration device technology, applied in the direction of analog/digital conversion calibration/test, electrical components, electrical signal transmission system, etc., can solve the problems of reducing circuit speed, increasing cost, and unable to eliminate the impact, so as to achieve the goal of increasing speed Effect

Inactive Publication Date: 2005-03-23
SOUTHEAST UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although charge redistribution and capacitance averaging techniques can greatly reduce capacitance mismatch, these two capacitance mismatch reduction techniques require additional storage capacitance on the signal transmission path, which reduces the speed of the circuit, and it cannot eliminate Effects of Channel Charge Injection and Clock Feedthrough Caused by Transistor Switching on Capacitance Mismatch
For on-chip capacitor laser trimming, the calibration process is only performed once during chip manufacturing, which requires the circuit to have time and temperature stability, and requires additional calibration procedures, increasing costs

Method used

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Examples

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Embodiment Construction

[0012] A capacitor mismatch calibration device capable of matching capacitors, consisting of calibrated capacitors C1 and C2, comparator offset calibration capacitor C3, calibration capacitor C4, and comparator COMP, calibrated capacitors C1 and C2, and comparator offset calibration capacitor C3 One end of the calibration capacitor C4 is connected to the inverting input of the comparator COMP, and the other ends of the calibrated capacitors C1 and C2 are respectively connected to the input voltage V a and V bOne end of the symmetrical capacitance C1' and C2' of the calibrated capacitance C1 and C2, the symmetrical capacitance C3' of the comparator offset calibration capacitance C3, and the symmetrical capacitance C4' of the calibration capacitance C4 are connected to the non-inverting input end of the comparator COMP, and the other One end is grounded, and it is characterized in that a feedback mismatch adjustment circuit and a feedback offset adjustment circuit are respective...

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PUM

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Abstract

The invention discloses a capacitor mismatch adjusting device used in the chip and is composed of the capacitor to be adjusted, comparator maladjusted adjusting capacitor, adjusting capacitor and comparator. The capacitor mismatch compensating circuit of the invention adopts the charge on the self-adapting adjusting mismatch adjusting capacitor, increases the speed of the circuit, and eliminates the affect to the capacitor mismatch from the channel charge afflux and the clock feedthrough caused by the on-off of the diode. It is also benefit to increase the precision of the capacitor match.

Description

technical field [0001] The invention relates to a mismatch calibration circuit applicable to successive approximation analog-to-digital converters, pipeline structure analog converters and other mismatch calibration circuits that require precise capacitance matching, in particular to a capacitor mismatch calibration device that can be used in chips. technical background [0002] Under the existing process technology conditions, due to the random fluctuation of the process, the matching accuracy of the capacitor is about 10-11 digits. Therefore, when precise matching of capacitors is required, such as high-speed and high-precision ADCs, DACs, and switched capacitor circuits, etc., must be Capacitors are mismatch calibrated to achieve an exact match. Common capacitance mismatch calibration techniques include charge redistribution, capacitance averaging techniques, and laser correction. Although charge redistribution and capacitance averaging tech...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/10H03M1/38
Inventor 吴建辉吴光林李红戚涛时龙兴
Owner SOUTHEAST UNIV
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