Unlock instant, AI-driven research and patent intelligence for your innovation.

High-frequency low-consumption power junction type field effect transistor

A field effect transistor and low power consumption technology, applied in the field of power junction field effect transistors, can solve the problems of low and high frequency power loss, TrenchJFETQg is not small enough, etc., and achieve the effect of reducing the area of ​​the PN junction

Inactive Publication Date: 2006-08-02
BEIJING UNIV OF TECH
View PDF1 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The present invention aims at improving the structure of the existing TrenchJFET's Qg which is not small enough, and can obtain lower high-frequency power loss than the existing low-voltage power semiconductor devices

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • High-frequency low-consumption power junction type field effect transistor
  • High-frequency low-consumption power junction type field effect transistor
  • High-frequency low-consumption power junction type field effect transistor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0075] Embodiment 1: Embodiment 1 of the present invention is a kind of normally closed trench gate N-channel silicon junction field effect transistor with buried local silicon oxide region, with figure 2 Shown is a part of its cross-section, the channel region 1.1 is N-type silicon, the doping concentration is 5×10 15 cm -3 ; The source region 1.2 is heavily doped N-type silicon with a thickness of 0.2 microns and a doping concentration higher than 1×10 19 cm -3 , the purpose of heavy doping is to reduce the series resistance of the source region and the electrode contact resistance. The total thickness g of the source region and the channel region is 3 microns; the planar pattern of the source region is long; there are Surrounded by trenches 1.4, the trench depth h is 0.5 microns, the trench width c is 0.6 microns, and the trench spacing b is 0.5 microns; the gate region 1.5 is a P-type region located in the semiconductor silicon around the bottom of the trench, and the ga...

Embodiment 2

[0076] Embodiment 2: Embodiment 2 of the present invention is a normally-on trench gate N-channel silicon junction field-effect transistor with a buried local silicon oxide region, with image 3 Shown is a part of its section, the channel region 2.1 is N-type silicon, doping concentration 1×10 16 cm -3 ; The source region 2.2 is heavily doped N-type silicon, the thickness H is 0.2 microns, and the doping concentration is higher than 1×10 19 cm -3 , the purpose of heavy doping is to reduce the series resistance of the source region and the electrode contact resistance; the plane pattern of the source region is elongated; the source region is surrounded by trenches 2.4, the trench depth Z is 0.5 microns, and the trench width W is 0.6 micron, and the trench spacing U is 1 micron; the gate region 2.5 is a P-type region located in the semiconductor silicon around the bottom of the trench, and a PN junction is formed between the gate region 2.5 and the channel region 2.1; the adja...

Embodiment 3

[0077] Embodiment 3: Embodiment 3 of the present invention is a kind of normally-on surface gate N-channel silicon junction field-effect transistor with buried local insulating region, with Figure 4 Shown is a part of its section, the channel region 3.1 is N-type silicon, doping concentration 1×10 14 cm -3 ; The thickness R is 40 microns; the source region 3.2 is heavily doped N-type silicon, the thickness is 0.5 microns, and the doping concentration is higher than 1×10 19 cm -3 , the purpose of heavy doping is to reduce the source region series resistance and electrode contact resistance, the planar pattern of the source region is strip type; the gate region 3.4 is a P-type silicon region, and a PN junction is formed between the gate region 3.4 and the channel region 3.1 ; The spacing Q between adjacent gate regions is 10 microns, which makes the PN junction barrier region unable to fully pinch off the channel between the gate regions when zero bias is applied between the ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A kind of high-frequency low-power dissipation junction field effect transistor is consisted with channel region, source region, drain region, grid region and source electrode, grid electrode and drain electrode. In the semiconductor under each grid electrode bury the local insulation regions which have some distance each other. The insulation material of the insulation region is silicon oxide, silicon nitride or other insulation material. The junction field effect transistor can be ditch grid type or plane grid type. It can be frequent opening type or frequent closing type. As the local insulation region change electric field distribution, especially the local insulation region and grid region partly overlap and cut a part of area of grid ditch PN junction, the grid ditch PN junction electric capacity and switching wastage are reduced. This invention has lower high-frequency power consumption than ditch grid MOSFET and ditch grid without burying local insulation region JFET.

Description

Technical field: [0001] The present invention relates to a semiconductor device, more specifically to a power junction field effect transistor (JFET). Background technique: [0002] Power transistors generally work in switching mode in power electronics, such as switching power supplies. The main requirement for power transistor performance is low power loss at high frequencies. This requires small on-state power consumption Pon and small switching power consumption Psw. The former requires a small on-state voltage drop Ron; the latter requires a small switch charge, that is, a small charge and discharge charge Qg is required when changing between the on and off states. Before the 1980s, power bipolar transistors and thyristors were used, and their Ron was small, but their Qg was large. While Psw is proportional to the operating frequency, Qg is too high to limit the operating frequency of these devices to within a few kilohertz. After the 1980s, the operating frequency ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/808
Inventor 亢宝位吴郁田波单建安
Owner BEIJING UNIV OF TECH