Method for forming secondary partition sheet used for strain silicon MOS transistor and structure thereof

Abstract

The method for forming CMOS supplies semiconductor substrate (ex. silicon wafer), and dielectric layer (ex. silica, silicon oxynitride) on the substrate. The method includes steps: forming grid layer of covering the dielectric layer, patternizing grid layer in order to form grid structure with multiple edges; forming dielectric layer on the grid structure in order to protect grid structure with multiple edges, and in optimization, thickness of the dielectric layer is smaller than 40 Nano; using the dielectric layer as protective layer to etch source region and drain region adjacent to the grid region to deposit materials of silicon, and germanium; materials of silicon, and germanium in source region and drain region make channel region between source region and drain region occur strain in compress mode. The method forms second protection layer of covering surface, and carries out anisotropic etching process in order to form struction of parting slip to seal grid structure.

Description

technical field [0001] The present invention relates to integrated circuits and their processing for the manufacture of semiconductor devices. More specifically, the present invention provides methods and structures for fabricating MOS devices using strained silicon structures for advanced CMOS integrated circuit devices. However, it should be realized that the present invention has broader applicability. Background technique [0002] Integrated circuits have grown from a handful of interconnected devices fabricated on a single silicon chip to millions of devices. Traditional integrated circuits offer performance and complexity far beyond what was originally imagined. To achieve increases in complexity and circuit density (i.e., the number of devices that can fit on a given chip area), with each generation of integrated circuits, the size of the smallest device linewidth (also referred to as device "geometry") becomes getting smaller and smaller. [0003] Increasing circ...

AI Technical Summary

Problems solved by technology

Although significant improvements have been made, the design of such devices still has many limitations

Just as an example, these designs must get smaller and smaller, but still provide a clean signal for switching, which becomes more difficult as the device gets smaller

In addition, these designs are often difficult to manufacture and often require complex manufacturing processes and structures

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