Nonvolatile semiconductor memory for storing multivalued data
A non-volatile, semiconductor technology, applied in the direction of digital memory information, static memory, read-only memory, etc., can solve the problems of complex rewriting control, inability to effectively use the address space of non-volatile semiconductor memory, etc., to achieve increased speed effect
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no. 1 example
[0064] FIG. 1 is a diagram showing a schematic structure of a nonvolatile semiconductor memory 200 according to a first embodiment. In FIG. 1, a memory cell array 10 includes a plurality of word lines and a plurality of bit lines, and memory cells are arranged in a matrix at intersections of the word lines and the bit lines. A word line control circuit 20 and a bit line control circuit 40 are connected to the memory cell array 10 .
[0065] The word line control circuit 20 is used to select a predetermined word line in the memory cell array 10, and apply voltages required for reading, writing (programming), and erasing. The row decoder 30 is used to control the word line control circuit 20 so as to select a predetermined word line.
[0066] The bit line control circuit 40 includes a plurality of data latch circuits as described below, and is used to read the data of the memory cells in the memory cell array 10 through the bit lines, and detect (verify) the stored data in the ...
no. 2 example
[0131] Next, a second embodiment according to the present invention will be described with reference to the drawings.
[0132] FIG. 11 is a diagram showing the structure of a nonvolatile semiconductor memory 200 according to the second embodiment. In FIG. 11 , components having the same functions as those of the first embodiment have the same reference numerals, and their detailed descriptions are omitted. Only parts having different structures are described below.
[0133] FIG. 11 differs from FIG. 4 in the first embodiment in that the sector information storage area has a different structure. While the sector information storage area 13 is arranged in the memory cell array 10 in the first embodiment, the sector information storage area includes a ferroelectric memory (FeRAM) 300 in the second embodiment.
[0134] As such, the sector information storage area includes a ferroelectric memory (FeRAM) 300 capable of performing a high-speed read operation, a high-speed write ope...
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