Element fabrication substrate
a technology of element fabrication and substrate, which is applied in the direction of crystal growth process, polycrystalline material growth, chemistry apparatus and processes, etc., can solve the problems of affecting the capacitance of source and drain junction, affecting the performance of transistors, and reducing the power consumption of units
Inactive Publication Date: 2005-05-12
KK TOSHIBA
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Benefits of technology
The present invention provides a substrate for device fabrication that includes an insulating film and a very thin layer of monocrystal Ge on top of the insulating film. This layer is only 6 nm thick. This invention allows for the creation of more precise and efficient devices.
Problems solved by technology
This makes it possible to realize a high integration, and to lower a drive voltage, resulting in decreasing a power consumption per a unit element.
However, improvement of performance required in late years increases a technical barrier to be solved for the purpose of decreasing a gate length.
There is a problem that a parasitic capacitance of source and drain junctions disturbs a transistor operation which is caused by micronization of a transistor.
However, an on-insulating film laminating strain Ge thin layer having these both features is not realized under the present circumstances.
However, this method is a method for manufacturing a lattice-relaxed SiGe layer of high Ge composition as a substrate for a strained Si layer, unlike a method for forming a strained Ge thin layer.
Further, this method does not consider thinning the film thickness of the Ge layer.
However, a technique to form a strained Ge thin layer of extremely thin film thickness on an insulating film has not yet been realized.
Method used
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[0013] An embodiment of the present invention will be described referring to drawings.
[0014]FIGS. 1A to 1D illustrate sectional structures in steps of manufacturing a substrate used for fabricating devices such as transistors thereon, according to an embodiment of the present invention.
[0015] As shown in FIG. 1A, a SOI substrate 10 is prepared by forming an insulating film 12 of, for example, SiO2 on a Si substrate 11 and then forming a Si thin layer 13 on the insulating film.
[0016] As shown in FIG. 1B, Si1-xGex crystal is grown to a thickness of di (nm) with Ge composition xi on the Si thin film 13 on the insulating film Si by, for example, the CVD method to form a SiGe layer 15. In the present embodiment, assuming di=40 nm, and xi=0.15.
[0017] As shown in FIG. 1C, the substrate is subjected to thermal oxidation in oxidation ambient atmosphere. In the step of FIG. 1C, a Si oxidation film 16 is formed by oxidizing only Si in the Si thin layer 13 and SiGe layer 15. In this time, G...
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Abstract
A substrate used for fabricating devices thereon includes an insulating film, and a monocrystal Ge thin layer formed on the insulating film in contact therewith, the monocrystal Ge thin layer having a thickness not more than 6 nm. The monocrystal Ge thin layer has a thickness not less than 2 nm and a compressive strain.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2003-374571, filed on Nov. 4, 2003, the entire contents of which are incorporated herein by reference. BACKGROUND OF THE INVENTION [0002] The present invention relates to a substrate for device fabrication, the substrate having a monocrystal Ge thin layer for forming field effect transistors of high-performance thereon, a semiconductor device using this substrate, and a method for manufacturing the substrate. [0003] Conventionally, a method for increasing a drive current per a unit gate length by shortening a gate length of an individual transistor and thinning a gate insulation layer is adopted for realizing high-performance / high function of CMOS circuit device. By this method, the size of a transistor to provide a necessary drive current is decreased. This makes it possible to realize a high integration, and to lower a drive vo...
Claims
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IPC IPC(8): C30B3/00C30B29/08H01L21/20H01L21/205H01L29/161H01L21/28H01L21/324H01L21/336H01L21/762H01L21/84H01L27/12H01L29/10H01L29/78H01L29/786
CPCC30B3/00H01L29/78684H01L21/02381H01L21/0245H01L21/02488H01L21/02502H01L21/02532H01L21/28255H01L21/324H01L21/7624H01L21/84H01L29/1054H01L29/66742H01L29/78H01L29/7842C30B29/08
Inventor NAKAHARAI, SHUTEZUKA, TSUTOMUTAKAGI, SHINICHI
Owner KK TOSHIBA