High-temperature superconducting device and manufacturing method thereof

Abstract

At least two ramp-edge-structure Josephson junctions having different critical current densities to one another are provided on a substrate.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2003-089776, filed on Mar. 28, 2003, the entire contents of which are incorporated herein by reference. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] This invention relates to a high-temperature superconducting device and a manufacturing method thereof and, more particularly, to a high-temperature superconducting device characterized by a means to form the high-temperature superconducting device by a ramp-edge-type superconductor junction with various critical current densities Jc, and a manufacturing method thereof. [0004] 2. Description of the Related Art [0005] In recent years, oxide high-temperature superconductors as typified by yttrium-type superconductors have been expected to be applied to various fields such as sensors and logic circuits, since their superconducting state is exhibited at a tempe...

AI Technical Summary

Benefits of technology

[0027] It is an object of the present invention to allow a stable high-speed operation of a superconductor circuit such as an SFQ circuit.

[0031] By separately fabricating at least the two ramp-edge Josephson junctions 9 and 10 whose critical current densities Jc differ to each other above the substrate 1, and by utilizing each performance of the junctions differently depending on each element circuit, both a high-speed operation and a stable operation of the superconducting circuit device such as a SFQ circuit can be realized. Consequently, the performance of the high-temperature superconducting device can be enhanced.

[0032] In the above case, a Josephson junction 9 having a relatively high critical current density is used so that Ic×Rn is made larger, allowing a high-speed operation, while a Josephson junction 10 having a relatively low critical current density is used so that the junction width is widened and the inductance L is reduced, allowing a stable operation in a manner which fulfills the condition of L×Ic<φo in a circuit element having a strict L×Ic condition.

[0035] In such an element circuit, in order to make the product of L×Ic higher, it is possible to narrow the junction width so that Jc can be made higher without being restricted by the L×Ic product condition.

[0036] That is to say, it is important that junctions with different performances are used separately, in such a manner that an element circuit requiring high speed and high precision should contain a high-Jc junction, while an element circuit requiring a strict condition on the product of L×Ic should include a relatively low Jc junction so that the parasitic inductance L can be reduced.

Problems solved by technology

However, in the ramp-edge structure, in which a barrier layer is sandwiched by the upper and lower electrodes through the bridge portion, parasitic inductance is generated in series with the junction.

Hence, the above-described condition for the product of L×Ic (L×Ico) can no longer be fulfilled, and the circuit cannot be operated.

However, if the junction width is widened in order to reduce the parasitic inductance influence as much as possible, Jc of the Josephson junction cannot be made higher, so that the junction with relatively small-value product of Ic×Rn has to be used.

Consequently, the SFQ pulse width becomes wider, and a problem is caused in which the circuit performance is deteriorated in such a manner that the operational speed of the SFQ circuit is restricted, or the operational uncertainty (jitter) becomes greater.

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