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Digital Controller for Dc-Dc Switching Converters for Operation at Ultra-High Constant Switching Frequencies

a digital controller and converter technology, applied in the direction of dc-dc conversion, power conversion systems, instruments, etc., can solve the problems of long and tedious design process, inflexible and unsuitable for the integration with fast changing digital hardware, and low power consumption of analog controllers, so as to achieve power efficient operation

Active Publication Date: 2008-12-11
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0010]The present invention advances the art and helps overcome the aforementioned problems by providing a fast, low-power digital SMPS controller that can operate at programmable switching frequencies from 1 to 12 MHz. The solution can also be easily modified to operate at even higher frequencies. Simulations show that it can operate at about 120 MHz with optimization, and a DPWM was constructed that operates at 60 MHz. Implemented with the commonly used FPGA systems 1, the new controller can produce pulse-width modulated signals at frequencies up to 60 MHz with high 9-bit resolution. If on chip implementation is selected, the frequency range can easily be further expanded. The present invention can be implemented with digital logic gates only, or with a combination of digital gates and a minimal number of very simple analog components. In the latter case, the analog components can be used for the further power and size reduction, and can be developed in a small fraction of time needed for conventional analog designs.
[0011]One aspect of the present invention is a novel digital controller for low-power DC-DC switch mode power supplies (SMPS) suitable for on-chip implementation and use in portable battery-powered systems. The controller allows operation at ultra high constant switching frequencies and can be implemented with simple low-power digital hardware. These benefits are achieved by combining a newly designed digital pulse width modulator (DPWM), based on the second-order multi-bit sigma-delta (Σ-Δ) principle, with a dual-sampling mode PID compensator. The output voltage is either sampled at a frequency lower than the switching frequency (undersampled) or sampled at the switching rate. In steady-state, undersampling results in reduced power consumption, while during transients, sampling at the switching rate provides fast transient response.
[0013]Yet another aspect of the present invention is a method for digital control of SMPS that enables power efficient operation at constant switching frequencies significantly higher than 10 MHz.

Problems solved by technology

The analog controllers are fast and have low-power consumption but also suffer from many problems.
They generally require a long and tedious design process and often need to be completely redesigned each time IC implementation technology changes, and as such are not flexible and unsuitable for the integration with fast changing digital hardware on which the majority of portable devices is based.
In addition, the analog controllers are sensitive to temperature changes, variations in manufacturing process, and aging.
Implementation of the power savings techniques with analog hardware is a complex task.
It requires additional hardware, and could increase power consumption and the size of the device.
Power consumption of digital hardware is proportional to the product of switching frequency and size of the hardware (on-chip area) and in the existing solutions often exceeds the power consumed by the output load.
As a result, overall efficiency of digitally controlled SMPS is poor.
The lower switching frequency generally results in a larger, heavier, and more expensive power stage that can negate some or all of the abovementioned advantages of digital control.
The inferior performance of digitally controlled SMPS in low power applications is mainly caused by slow and power inefficient operation of basic functional blocks, digital pulse-width modulator, compensator and analog-to-digital controller.
They allow introduction of digitally controlled SMPS in larger portable systems, such as laptop computers, and camcorders, but are still not suitable for smaller portable devices.
For the targeted applications, they still have high power consumption and operate at relatively low switching frequencies.
The known digital controllers will also not be able to operate with upcoming SMPS that, in near future, are expected to operate at switching frequencies significantly higher than 10 MHz.

Method used

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  • Digital Controller for Dc-Dc Switching Converters for Operation at Ultra-High Constant Switching Frequencies

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experimental verification (

All-Digital FPGA Implementation)

[0067]The results of the verification demonstrated that the architecture of the present invention results in a significant increase of the switching frequencies at which digital controllers can be used. It is reasonable to assume that by transferring this design on an integrated circuit that is faster than the FPGA structure used, pulse width modulated signals at even higher frequencies (in the range of 100 MHz and about 120 MHz with optimization) could be achieved. This is based on implementation of the architecture to an integrated circuit in a manner that is known to those skilled in the art. Simulation results of such on-chip implementation are shown in FIG. 11, they verify operation at frequency of 115 MHz.

Closed Loop Operation

[0068]To further verify the operation of the controller, an experimental system based on block diagrams shown in FIG. 1 was constructed. To limit the switching losses of the buck converter switching frequency was decreased ...

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Abstract

A digital controller for low-power DC-DC switch mode power supplies (SMPS) suitable for on-chip implementation and use in portable battery-powered systems is provided. The digital controller allows operation at ultra high constant switching frequencies and can be implemented with a simple low-power digital hardware. The digital controller includes a digital pulse width modulator (DPWM), based on a multibit 2nd orders sigma-delta (Σ-Δ) principle, and a dual-sampling mode PID compensator. The output voltage is either sampled at a frequency lower than the switching frequency (undersampled) or sampled at the switching rate. In steady-state, undersampling results in reduced power consumption, while during transients, sampling at the switching rate provides fast transient response. Another aspect of the present invention is a dual sampling / clocking scheme, which is relied on by the DPWM described. A method is also provided for controlling low power DC-DC switch mode power supplies operating at high constant switching frequencies.

Description

FIELD OF THE INVENTION[0001]This invention relates to a digital device and a method of controlling supply voltage in low-power portable devices.BACKGROUND OF THE INVENTION[0002]Analog controlled switch-mode power supplies (SMPS) are used in low power devices such as cell phones, portable data assistants, and MP3 players, to transfer variable supply (i.e. battery) voltage to a constant output value. The regulation is performed through the interaction of an analog controller and direct-current to direct-current (DC-DC) switching power converter. The task of the controller is to monitor the output voltage and provide appropriate low-power pulse-width modulated control signals for the switching converter, which efficiently processes power. To allow small weight and size of the overall system, it is usually desirable that the controller produces signals at a high constant frequency (switching frequency fsw) that does not interfere with the proper operation of the supplied device. In the ...

Claims

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Application Information

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IPC IPC(8): H02M1/08H02M3/157
CPCH02M3/157
Inventor PRODIC, ALEKSANDAR
Owner NXP BV
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