Capacitivley coupled plasma reactor having a cooled/heated wafer support with uniform temperature distribution

Abstract

A plasma reactor for processing a workpiece includes a reactor chamber, an electrostatic chuck within the chamber for supporting a workpiece, an RF plasma bias power generator coupled to apply RF power to the electrostatic chuck and a refrigeration loop having an evaporator inside the electrostatic chuck with a refrigerant inlet and a refrigerant outlet. Preferably, the evaporator includes a meandering passageway distributed in a plane beneath a top surface of the electrostatic chuck. Preferably, refrigerant within the evaporator is apportioned between a vapor phase and a liquid phase. As a result, heat transfer between the electrostatic chuck and the refrigerant within the evaporator is a constant-temperature process. This feature improves uniformity of temperature distribution across a diameter of the electrostatic chuck.

Description

[0001]This application is a continuation of U.S. patent application Ser. No. 11 / 409,292 filed Apr. 21, 2006 entitled CAPACITIVELY COUPLED PLASMA REACTOR HAVING A COOLED / HEATED WAFER SUPPORT WITH UNIFORM TEMPERATURE DISTRIBUTION by Paul Brillhart, et al., which claims the benefit of U.S. Provisional Patent Application Ser. No. 60 / 725,763 filed Oct. 11, 2005. All of the above applications are hereby incorporated by reference in their entirety.BACKGROUND OF THE INVENTIONBackground of the Invention[0002]In a capacitively coupled plasma reactor, control over dissociation has been achieved with a wide impedance match space at very high RF source power over a very wide chamber pressure range. Such a wide operating range is attributable, at least in part, to a unique feature of the overhead electrode matched to the RF power source by a fixed impedance matching stub with the following features. First, the electrode capacitance is matched to the plasma reactance at a plasma-electrode resonant...

AI Technical Summary

Problems solved by technology

How to do all this without degrading the now highly uniform etch rate distribution currently afforded by the reactor is a difficult problem.

However, introduction of temperature probes near the wafer will create parasitic RF fields which distort the fine effects of the feed-point impedance dielectric sleeves and the dielectric ring process kit, defeating their purpose.

Temperature non-uniformities at the wafer arising from lack of control, to the extent that they impact the etch chemistry, will have the same ultimate effect of distorting an otherwise uniform environment.

One problem with such systems is that, at high RF power levels (high RF bias power or high RF source power or both), such cooling systems allow the wafer temperature to drift (increase) for a significant period before stabilizing after the onset of RF power.

This is undesirable because the wafer temperature rises uncontrollably during processing.

Such drift represents a lack of control over wafer temperature, and degrades the process.

The drift is caused by the inefficiency of the conventional cooling process.

Another problem is that rapid temperature variations between two temperature levels cannot be carried out for two reasons.

First, the heat transfer fluid that provides thermal transfer between the ESC and the coolant has a heat propagation time that introduces a significant delay between the time a temperature change is initiated in the refrigeration loop and the time that the wafer actually experiences the temperature change.

Secondly, there is a heat propagation time delay between the cooled portion of the ESC base and the wafer at the top of the ESC, this time delay being determined by the mass and heat capacity of the materials in the ESC.

One of the most difficult problems is that under high RF heat load on the wafer requiring high rates of thermal transfer through the cooled ESC, the thermal transfer fluid temperature changes significantly as it flows through the fluid passages within the ESC, so that temperature distribution across the ESC (and therefore across the wafer) becomes non-uniform.

However, the high RF heat loads, dictated by some of the latest plasma etch process recipes, cause temperature non-uniformities across the wafer diameter (due to sensible heating of the thermal transfer fluid within the ESC) that distort an otherwise uniform etch rate distribution across the wafer.

It has seemed that this problem cannot be avoided without limiting the RF power applied to the wafer.

However, as etch rate uniformity requirements become more stringent in the future, further reduction in RF power limits to satisfy such requirements will produce more anemic process results, which will ultimately be unacceptable.

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