Trench type power transistor device

Abstract

The present invention provides a trench type power transistor device including a substrate, an epitaxial layer, a doped diffusion region, a doped source region, and a gate structure. The substrate, the doped diffusion region, and the doped source region have a first conductivity type, and the substrate has an active region and a termination region. The epitaxial layer is disposed on the substrate, and has a second conductivity type. The epitaxial layer has a through hole disposed in the active region. The doped diffusion region is disposed in the epitaxial layer at a side of the through hole, and is in contact with the substrate. The doped source region is disposed in the epitaxial layer disposed right on the doped diffusion region, and the gate structure is disposed in the through hole between the doped diffusion region and the doped source region.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application is a divisional application of and claims the benefit of U.S. patent application Ser. No. 13 / 543,877, filed Jul. 8, 2012.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention generally relates to the field of semiconductor power devices. More particularly, the present invention relates to a trench type power transistor device having super-junction structures and a method thereof.[0004]2. Description of the Prior Art[0005]Power devices are used in power management; for example, in switchable power supplies, management integrated circuits in the core or in the peripheral region of computers, backlight power supplies, and in electric motor controls. The type of power devices described above include an insulated gate bipolar transistor (IGBT), a metal-oxide-semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT) and so forth.[0006]Please refer to FIG. 1, which is a s...

AI Technical Summary

Benefits of technology

The present invention is related to a method for fabricating a trench type power transistor device with low Miller capacitance and high voltage sustaining ability. The method involves doping diffusion layers in the device with a dopant source layer to create a super junction structure. A parasitical capacitor between the gate and drain can be reduced, resulting in improved performance of the device. The method also reduces switching losses and improves the performance of the device.

Problems solved by technology

However, since an overlapped area between a gate structure and an N-type epitaxial layer (also called drain region) in this power transistor device is relatively high, and the thickness of a gate dielectric layer between the gate structure and the N-type epitaxial layer is relatively thin, these will cause relatively high Miller capacitance and produce inevitable switching losses.

As a result, the performance of the devices is lowered.

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