Semiconductor device and method for manufacturing same

Abstract

A method for manufacturing a semiconductor device includes the steps of: forming, on a principal face of a substrate, a semiconductor layer including a first semiconductor region of a first conductivity type; and forming, in the semiconductor layer, a trench having a bottom located in the first semiconductor region. The method further includes a step of forming a trench bottom impurity region being of a second conductivity type and covering the bottom of the trench by performing annealing to cause part of the semiconductor layer corresponding to an upper corner portion of the trench to move to be placed on the bottom of the trench.

Description

TECHNICAL FIELD[0001]The present disclosure relates to semiconductor devices and manufacturing method of the semiconductor devices, and in particular, to semiconductor devices (power semiconductor devices) capable of withstanding a high voltage and a large current.BACKGROUND ART[0002]Silicon carbide (SiC), of which the band gap and the dielectric breakdown voltage strength are greater than those of silicon (Si), is a semiconductor material which is expected to be applied to next-generation low-loss power devices, for example. SiC exists in various polytypes such as 3C—SiC which is a cubic system, 6H—SiC and 4H—SiC which are hexagonal systems. Among the polytypes, 4H—SiC is generally used for producing silicon carbide semiconductor devices.[0003]A typical power device including SiC and serving as a switching element is a field effect transistor such as a metal insulator semiconductor field effect transistor (hereinafter referred to as a “MISFET”) or a metal semiconductor field effect...

AI Technical Summary

Benefits of technology

The semiconductor device and manufacturing method described in this patent make it possible to form an impurity region on the bottom of a trench without misalignment. This reduces the concentration of electric field and improves the on-resistance, which can be caused by misalignment.

Problems solved by technology

In the vertical MOSFET thus configured, when a high voltage is applied between the source and drain, concentration of electric field is likely to occur on the bottom of the trench, which causes a dielectric breakdown in the gate insulating film on the bottom of the trench.

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