Hv converter with reduced EMI

Abstract

A high voltage (HV) converter implemented on a printed circuit board (PCB) includes a double diffused metal oxide semiconductor (DMOS) package comprising a lead frame and a main DMOS chip. The lead frame includes a gate section electrically connected to a gate electrode of the main DMOS chip, a source section electrically connected to a source electrode of the main DMOS chip and a drain section electrically connected to a drain electrode of the main DMOS chip. The PCB layout includes a large area source copper pad attached to and overlapping the source section of the DMOS package to facilitate cooling and a small area drain copper pad attached to and overlapping the drain section of the DMOS package to reduce electromagnetic interference (EMI) noise.

Description

INCORPORATION BY REFERENCE[0001]The disclosure made in the U.S. Pat. No. 5,402,329 to Wittenbreder Jr. and U.S. Patent Application Publication Number 2017 / 0264206 to Rana et al. are hereby incorporated by reference.FIELD OF THE INVENTION[0002]This invention relates generally to high voltage converters using double-diffused metal-oxide semiconductor (DMOS) devices. More particularly, the present invention relates to a high voltage converter with improved electromagnetic interference (EMI) noise using an improved DMOS package.BACKGROUND OF THE INVENTION[0003]FIG. 1 shows circuitry 400 of a single-switch flyback converter in examples of the present disclosure. The single-switch flyback converter includes a switch 420, a transformer 440 and a resistor 460. The transformer 440 has a primary winding 442 and a secondary winding 444. A first end of the switch 420 is connected to a first end of the primary winding 442 of the transformer 440. A second end of the switch 420 is connected to the...

AI Technical Summary

Benefits of technology

The present invention is about high voltage converters that use double-diffused metal-oxide semiconductor (DMOS) packages. These packages include a lead frame, a main DMOS chip, metal bumps, a connector, and molding encapsulation. The lead frame has a gate section, a source section, and a drain section. The main DMOS chip has a gate electrode and a source electrode on its bottom surface and a drain electrode on its top surface. The patent describes aPCB layout for a flyback converter that minimizes electromagnetic interference noise and cooling issues. The technical effects of this invention are the improved performance and reliability of high voltage converters.

Problems solved by technology

The performance of the PCB layout 500 is not optimized due to necessary tradeoff between thermal dissipation and EMI noise reduction.

However for high voltage applications such as 500V or higher, the EMI noise is high due to the fast changing and high drain voltage.

Furthermore, for high voltage applications, the high voltage drain lead with large area will demand large safety space therefore increasing the device area, making it challenge to minimize the device size while keeping safety space for high voltage.

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