Non-quasistatic phase lock loop frequency divider circuit

Abstract

A non-quasistatic MOS frequency divider circuit uses a phase lock loop configuration including an antenna coil to induce a differential input signal, an antenna resonating capacitor, a rectifier, a voltage controlled ring oscillator, a phase detector and a loop filter. All transistors used are organic MOS devices of PMOS, NMOS or both PMOS and NMOS varieties. The voltage-controlled oscillator includes a multiple delay stage ring oscillator. The phase detector includes transistors connected as sampling switches to sample the individual oscillator stage voltages into the loop filter. The sampling transistors have gates connected to the coil. The loop filter provides a substantially direct current to a loop amplifier and then to the voltage controlled oscillator delay control input. This configuration results in the voltage controlled oscillator frequency being synchronous to—and at a sub-multiple of the antenna signal frequency. The sampling transistor gates are all connected to the coil and thereby become part of the capacitance of the radio frequency parallel resonant network. The transistor gates are then efficiently switched at the rate of the radio frequency signal with no delay relative to the coil voltage. Operation of the phase detector organic transistors is based on non-quasistatic behavior of the transistor. Non-quasistatic operation results in phase detection at a frequency much higher than the quasistatic limit of transistor unity gain bandwidth.

Description

[0001]The present application is related to and claims priority from U.S. Provisional Application Ser. Nos. 60 / 536,603, filed Jan. 15, 2004, entitled “Circuitry for the Design of RFID Tags in Polymer Electronic Processes”, 60 / 539,611, filed Jan. 27, 2004, entitled, “RFID Organic Process Methods”, 60 / 539,612, filed Jan. 27, 2004, entitled, “RFID Organic Circuit Designs”, and 60 / 539,610, filed Jan. 27, 2004, entitled, “RFID Organic Flexographic Printline Method”. The disclosures of all four provisional applications are herein specifically incorporated in their entirety by this reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The invention relates to organic transistors, and, more particularly, to a phase lock loop circuit and frequency division method suitable for use given the performance constraints of organic transistors.[0004]2. Description of the Related Art[0005]Organic MOS transistors are similar to silicon metal-oxide-semiconductor transistors in opera...

AI Technical Summary

Problems solved by technology

Capacitive loading effects of the phase detector transistor gates are absorbed in the capacitance of the antenna tuned-circuit resulting in a large signal voltage at the gates.

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