Dynamic random access memory device with the combined open/folded bit-line pair arrangement

Abstract

A dynamic random access memory device includes a semiconductor substrate, a plurality of parallel word lines on the substrate, and a plurality of pairs of bit lines transverse to the word lines on the substrate. An array of one-transistor memory cells are selectively arranged at the cross points as defined between the word lines and the bit lines. The array is subdivided into a plurality of subarray sections. A sense amplifier section is connected to the bit lines. The sense amplifier section includes first and second sense amplifier circuits. Adjacent bit-line pairs of the bit lines include a first bit-line pair and a second bit-line pair, one of which has a folded bit-line arrangement being included in a certain subarray section to be connected to the first sense amplifier circuit, and the other of which has an open bit-line arrangement that extends into the subarray section and another subarray section adjacent thereto, and is connected to the second sense amplifier circuit.

Description

BACKGROUND OF THE INVENTION1. Field of the InventionThe present invention relates in general to semiconductor memory devices and in more particular to dynamic random-access memory (DRAM) devices of the type employing an array of one-transistor memory cells. The invention also relates to an improved sense amplifier circuitry for a MOS memory device.2. Description of the Related ArtRecently, MOS dynamic random access memory (DRAM) devices are becoming more widely used in the manufacture of digital equipment, particularly small-size computers, as the speed and cost advantages of these devices increase. As semiconductor technology is advanced, the devices are increasing in integration density due to remarkable improvements in the memory cell structure and in the micro-fabrication techniques. As memory devices require higher packing density (integration density), higher speed, and lower dissipation, the sense amplifiers become critical.Some prior DRAM devices employ what is called the "o...

AI Technical Summary

Benefits of technology

It is therefore an object of the present invention to provide a new and improved semiconductor memory device which can attain high integration density.

It is another object of the invention is to provide a new and improved dynamic random access memory device which can exhibit higher packing density of an array of memory cells, while allowing the design rule for sense amplifiers to be moderate or flexible on a chip substrate of limited size.

Problems solved by technology

As memory devices require higher packing density (integration density), higher speed, and lower dissipation, the sense amplifiers become critical.

A conflicting problem may exist in the two types of bit-line systems: While the open bit-line system is advantageous in the achievement of higher integration density of the memory cells, it suffers from the difficulty in designing sense-amplifier circuits to meet a strict circuit-design rule, which may results in that the positioning or distributing the sense amplifiers is difficult in a limited surface area of the substrate.

Such a sense-amplifier layout requirement makes it difficult to arrange a number of sense amplifier circuits on the chip substrate as a whole.

However, even such a bit-line system will not able to meet sufficiently the demands for an further improvement in the integration density of DRAMs in the near future.

Unfortunately, with the presently available folded bit-line system, it cannot be permitted in principle that memory cells are arranged or distributed among all the cross points defined between the word lines and the bit lines, as has been described previously.

In particular, when the semiconductor technology is rushed into the age of extra-highly integrated DRAMs of the next generation (such as 256M-bit DRAMs or more), which will strictly require a further reduction in the cell-array area, it may be obvious that the folded bit-line system can no longer go with the trend of further improvements in the integration density.