Method of forming shallow trench isolation structure in a semiconductor device
A technology for semiconductors and devices, applied in the field of manufacturing shallow trench isolation structures, can solve problems such as device failure and connection leakage
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[0014] see Figure 3A According to the method for forming the shallow trench isolation structure of the present invention, the thermal oxidation of the surface of the silicon substrate 60 can form a thin layer of pad oxide 62 on the upper part of the silicon substrate 60 . The first layer of nitride layer 64 is deposited on the top of the pad oxide layer 62 with a thickness of typically 100 -500 range, the thickness of the pad oxide layer 62 is usually 50 -200 range, followed by the deposition of a second silicon oxide layer 66, usually in the thickness of 100 -300 Between the range, and the second layer of silicon nitride layer 68, the thickness is usually 1000 -2000 range between. In a typical process, silicon nitride layers 64 and 68 and oxide layer 66 are formed by low pressure chemical vapor deposition (LPCVD). Such as Figure 3B As shown, trench regions are first formed from a mask (not shown) formed on top of the second silicon nitride layer 68, and the...
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