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Method and structure for preventing soldering pad stripping

A manufacturing method and pad technology are applied in the structure of preventing pad peeling and the manufacturing field of preventing pad peeling, which can solve problems such as damage to components, peeling of pad metal layer, affecting process yield, etc., to achieve enhanced bonding, The effect of preventing pad peeling

Inactive Publication Date: 2009-07-15
UNITED MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, when the wire bonding process (or welding process) is performed on the pad, it is easy to cause the pad metal layer to bear excessive stress due to improper parameter control, resulting in peeling of the pad metal layer, thereby damaging the pad metal layer. elements below the layer
[0004] In particular, with the continuous development of the process, the use of the pad metal layer of the fine pitch wire bonding method will cause the problem of peeling of the pad metal layer to become more serious.
Therefore, how to avoid the problem of peeling off of the metal pad metal layer due to excessive stress in the packaging process of semiconductor components, thereby affecting the process yield, has become the goal of the current industry.

Method used

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  • Method and structure for preventing soldering pad stripping
  • Method and structure for preventing soldering pad stripping
  • Method and structure for preventing soldering pad stripping

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Embodiment Construction

[0042] Figure 1A to Figure 1D It is a schematic cross-sectional flow diagram of a manufacturing method for preventing pad peeling according to an embodiment of the present invention.

[0043] First, please refer to Figure 1A , a semiconductor substrate 100 is provided, and an active circuit structure (not shown) has been formed in the semiconductor substrate 100 . In order to make the diagram more concise and clear, Figure 1AOnly the uppermost conductor layer 102 in the active circuit structure is shown in the figure, and all components in the active circuit structure are not shown, but those skilled in the art should know that the active circuit structure is composed of multiple circuits, for example components and multiple metal interconnection structures. In this embodiment, the active circuit structure in the semiconductor substrate 100 is represented by the conductive layer 102 .

[0044] Next, please refer to Figure 1B , forming a dielectric layer 104 on the semi...

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Abstract

A manufacturing method that avoids stripping welding pad provides a semiconductive substrate comprising a formed active circuit structure, and a dielectric with an opening is formed on the semiconductive substrate, and the opening is formed in the dielectric above the edge of the active circuit, and part of the surface of the active circuit structure is exposed. Then the welding pad is formed above the semiconductive substrate to electrically connect the active circuit structure, wherein, the welding pad covers the dielectric above the active circuit structure and fills the opening, thus forming a protective layer to cover the surface of the dielectric layer and the edge of the welding pad.

Description

technical field [0001] The invention relates to a welding pad technology of an integrated circuit, in particular to a manufacturing method and a structure for preventing the peeling off of the welding pad. Background technique [0002] Generally speaking, the metal pad layer formed on the surface of the semiconductor device is used as the connection interface between the internal circuit and the external signal, and the metal pad layer is electrically connected to the internal circuit. In the packaging technology of semiconductor components, when the integrated circuit components are completed, the wafer must be cut into dies one by one through the step of cutting, and then continue to carry out the die bonding step, and then use wire bonding ( Wire bonding) uses gold (Au) metal wires to complete the electrical connection between the external circuit and the pad metal layer, and then performs the sealing step to complete the entire semiconductor device packaging process. ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/60H01L21/28H01L23/485
CPCH01L24/05H01L2224/02166H01L2224/05552H01L2924/14H01L2924/00
Inventor 吴炳昌
Owner UNITED MICROELECTRONICS CORP