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Chip buried in semiconductor encapsulation base plate structure and its manufacturing method

A technology for packaging substrates and semiconductors, which is used in semiconductor/solid-state device manufacturing, semiconductor devices, and semiconductor/solid-state device components. It can solve problems such as overflowing glue and ineffective filling, avoiding environmental problems and shortening electrical connection paths. , The effect of saving material cost

Active Publication Date: 2009-12-30
PHOENIX PRECISION TECH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] Yet another object of the present invention is to provide a chip-embedded semiconductor package substrate structure and its manufacturing method, which can avoid problems such as glue overflow and ineffective filling caused by the glue filling process in the packaging process between the existing chip and its storage substrate, and effectively Improve production quality and product reliability

Method used

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  • Chip buried in semiconductor encapsulation base plate structure and its manufacturing method
  • Chip buried in semiconductor encapsulation base plate structure and its manufacturing method
  • Chip buried in semiconductor encapsulation base plate structure and its manufacturing method

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Embodiment

[0019] see Figure 2A to Figure 2J Fig. 1 is a schematic cross-sectional view of the chip-embedded semiconductor packaging substrate structure manufacturing method of the present invention.

[0020] Such as Figure 2A As shown, a metal layer 20 is firstly provided, and an insulating layer 21 is adhered on a surface of the metal layer, and the insulating layer 21 is formed with at least one opening 210 exposing a part of the metal layer 20 covered thereunder. The metal layer 20 can be made of copper foil, for example. The material of the insulating layer 21 can be selected from PI (Polyimide), PTFE (polytetrafluoroethylene-polytetrafluoroethylene), ABF, bismaleimide triazine (BT, Bismaleimide triazine), FR5 resin or organic resin mixed with Filler mixed materials, etc., and the insulating layer 21 has not been baked and hardened when it is placed on the metal layer 20 .

[0021] Such as Figure 2B As shown, the inactive surface 22b of at least one semiconductor chip 22 is c...

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Abstract

This invention relates to one chip imbed semiconductor sealing baseboard and its process method, wherein, the structure comprises one metal layer, one insulation layer with open, one supportive board with open and at least one semiconductor chip, one insulation layer and at least one circuit layer. This invention integrates chip and its supportive board process and semiconductor sealing technique to provide large elasticity and to simplify the semiconductor procedure interface.

Description

technical field [0001] The present invention relates to a chip-embedded semiconductor packaging substrate structure and a manufacturing method thereof, in particular to a chip-embedded semiconductor packaging substrate structure and a manufacturing method thereof integrating a heat sink, a semiconductor chip and a circuit structure at the same time. Background technique [0002] Since IBM introduced Flip Chip Package technology in the early 1960s, compared with Wire Bond technology, Flip Chip technology is characterized by the fact that the electrical connection between the semiconductor chip and the substrate is through solder bumps. Instead of ordinary gold wire. The advantage of this flip-chip technology is that the technology can increase the packaging density to reduce the size of the packaged components. At the same time, this flip-chip technology does not need to use long metal wires, which can improve electrical performance. In view of this, the industry has used hi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/56H01L21/60H01L25/00H01L23/28H01L23/488H01L23/36
CPCH01L24/19H01L2224/73204H01L2224/16225H01L2224/32225H01L2224/04105H01L2224/12105H01L2224/19H01L2224/32245H01L2224/73267H01L2224/92244H01L2924/14H01L2924/351H01L2924/00H01L2924/00012
Inventor 许诗滨
Owner PHOENIX PRECISION TECH CORP
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